Ch 02: 16-Bit Segmented Memory Model & Addressing Modes

395 Questions395 MCQs0 Short Questions0 Long Questions
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CS401 - Computer Architecture and Assembly Language Programming Examination Practice

Timed practice exam simulation for CS401 - Computer Architecture and Assembly Language Programming.

๐Ÿ“˜ VU MID TERM EXAMLectures 1 to 22
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Mid Term Examination

Covers syllabus of Lectures 1 to 22 with 30 high-yield MCQs in a timed exam environment.

๐Ÿ“30 MCQs
โฑ๏ธ60 Minutes
๐Ÿ“— VU FINAL TERM EXAMLectures 23 to 45
โฑ๏ธ 90 Mins

Final Term Examination

Comprehensive semester exam preparation with 45 MCQs covering Lectures 23 to 45 with complete course coverage.

๐Ÿ“45 MCQs
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Showing 291 โ€“ 300 of 395 Questions
Page 30 of 40
Q291
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 2๐Ÿท๏ธ BP Register Default Stack Segment (SS) AddressingEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
In 8088 assembly, the instruction 'MOV [BP], AL' copies the 1-byte content of register AL into the memory address contained in register BP within which default segment?
๐Ÿ’ป assembly Snippet
mov [bp], al
  1. A.Stack Segment (SS)
  2. B.Code Segment (CS)
  3. C.Data Segment (DS)
  4. D.Extra Segment (ES)
Q292
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 2๐Ÿท๏ธ OUT Instruction Accumulator Source Register (AL/AX)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
When executing the OUT assembly instruction to output data to an I/O port, which register serves as the required source operand?
๐Ÿ’ป assembly Snippet
out dx, al
  1. A.AL or AX
  2. B.BL or BX
  3. C.CL or CX
  4. D.DL or DX
Q293
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 2๐Ÿท๏ธ MOV Instruction Flag Non-ModificationEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
True or False: Executing 'MOV AX, 0' will set the Zero Flag (ZF = 1) in the FLAGS register.
๐Ÿ’ป assembly Snippet
mov ax, 0  ; Flags remain unchanged
  1. A.True
  2. B.False
Q294
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 2๐Ÿท๏ธ 32-Bit EAX and 16-Bit AX Register Sub-DivisionEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
In 32-bit x86 architecture, the lower 16 bits of the 32-bit accumulator register EAX are designated as:
  1. A.AX
  2. B.BX
  3. C.EAX
  4. D.None of the above
Q295
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 2๐Ÿท๏ธ EAX and AX Register Sub-DivisionEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
In 32-bit x86 CPU architecture, the lower 16 bits of the 32-bit accumulator register EAX are designated as:
  1. A.AX
  2. B.BX
  3. C.EAX
  4. D.None of the above
Q296
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 2๐Ÿท๏ธ IN Instruction Accumulator Destination Register (AL/AX)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
When executing the IN assembly instruction to read data from an I/O port, which register serves as the mandatory destination operand?
๐Ÿ’ป assembly Snippet
in al, 0x60
  1. A.AL or AX
  2. B.BL or BX
  3. C.CL or CX
  4. D.DL or DX
Q297
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 2๐Ÿท๏ธ 2.7. Stack OperationsEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
Which stack instruction decrements the Stack Pointer (SP) by 2 and then copies a 16-bit word from the source operand onto the top of the stack?
๐Ÿ’ป assembly Snippet
push ax
  1. A.PUSH
  2. B.POP
  3. C.CALL
  4. D.MOV
Q298
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 2๐Ÿท๏ธ 2.7. Stack OperationsEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
True or False: Executing a PUSH instruction increments the Stack Pointer (SP) by two before copying a word to the stack.
๐Ÿ’ป assembly Snippet
push ax  ; Decrements SP by 2, then stores AX at SS:SP
  1. A.True
  2. B.False
Q299
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 2๐Ÿท๏ธ 2.7. Stack OperationsEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
Which CPU register holds the 16-bit offset of the current top of the stack in x86 architecture?
  1. A.SP (Stack Pointer)
  2. B.BP (Base Pointer)
  3. C.IP (Instruction Pointer)
  4. D.DI (Destination Index)
Q300
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 2๐Ÿท๏ธ 2.8. Effective Address CalculationEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
All memory addressing modes in iAPX88 architecture calculate and return an offset number known as the:
๐Ÿ’ป assembly Snippet
mov ax, [bx+si+4]  ; Effective Address = BX + SI + 4
  1. A.Effective address
  2. B.Faulty address
  3. C.Indirect address
  4. D.Direct address