Ch 02: 16-Bit Segmented Memory Model & Addressing Modes

395 Questions395 MCQs0 Short Questions0 Long Questions
๐ŸŽฏ Exam Practice Papers
SEMESTER PASS

CS401 - Computer Architecture and Assembly Language Programming Examination Practice

Timed practice exam simulation for CS401 - Computer Architecture and Assembly Language Programming.

๐Ÿ“˜ VU MID TERM EXAMLectures 1 to 22
โฑ๏ธ 60 Mins

Mid Term Examination

Covers syllabus of Lectures 1 to 22 with 30 high-yield MCQs in a timed exam environment.

๐Ÿ“30 MCQs
โฑ๏ธ60 Minutes
๐Ÿ“— VU FINAL TERM EXAMLectures 23 to 45
โฑ๏ธ 90 Mins

Final Term Examination

Comprehensive semester exam preparation with 45 MCQs covering Lectures 23 to 45 with complete course coverage.

๐Ÿ“45 MCQs
โฑ๏ธ90 Minutes
Showing 271 โ€“ 280 of 395 Questions
Page 28 of 40
Q271
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 2๐Ÿท๏ธ Parity Concept and Parity Flag (PF)Easyโญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
Which of the following statements is true regarding Parity in binary computer arithmetic?
  1. A.Parity refers to the count of '1' bits in a binary representation
  2. B.Parity is categorized as either odd parity or even parity
  3. C.Both A and B
  4. D.None of the given options
Q272
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 2๐Ÿท๏ธ Auxiliary Carry Flag (AF) Nibble Carry MechanicsEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
During addition or subtraction, if a carry or borrow occurs from bit 3 to bit 4 (between lower and upper nibbles), which CPU flag is set?
๐Ÿ’ป assembly Snippet
add al, bl
  1. A.Auxiliary Carry Flag (AF)
  2. B.Carry Flag (CF)
  3. C.Trap Flag (TF)
  4. D.Parity Flag (PF)
Q273
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 2๐Ÿท๏ธ Zero Flag (ZF) Condition ReportingEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
Which status flag in the FLAGS register is set to 1 if the result of the previous arithmetic or logical instruction is zero?
๐Ÿ’ป assembly Snippet
sub ax, ax
  1. A.Carry Flag (CF)
  2. B.Parity Flag (PF)
  3. C.Direction Flag (DF)
  4. D.Zero Flag (ZF)
Q274
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 2๐Ÿท๏ธ Assembly Language Comment Syntax (;)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
In x86 assembly language, which symbol is used to indicate the start of a single-line comment?
๐Ÿ’ป assembly Snippet
; This is a single-line comment in x86 assembly
  1. A.Colon (:)
  2. B.Hyphen (-)
  3. C.Semicolon (;)
  4. D.Asterisk (*)
Q275
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 2๐Ÿท๏ธ Assembly Instruction Operand CountEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
In the assembly language instruction 'MOV AX, 5', how many total operands are present?
๐Ÿ’ป assembly Snippet
mov ax, 5
  1. A.1
  2. B.2
  3. C.3
  4. D.4
Q276
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 2๐Ÿท๏ธ Control Flags vs Status FlagsEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
The Direction flag (DF), Interrupt flag (IF), and Trap flag (TF) are classified as control flags that are:
  1. A.Used for mathematical operations
  2. B.Not used for mathematical operations
  3. C.Status flags
  4. D.Parity flags
Q277
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 2๐Ÿท๏ธ Memory Address Space Selection vs I/O SpaceEasyโญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
Memory address space is selected when which of the following instructions is executed by the processor (in contrast to I/O port address space selection via IN/OUT instructions)?
๐Ÿ’ป assembly Snippet
mov ax, [num1]
  1. A.MOV
  2. B.DEC
  3. C.IN
  4. D.ADD
Q278
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 2๐Ÿท๏ธ 32-Bit Processor Accumulator Register WidthEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
A 32-bit microprocessor architecture features an accumulator register (EAX) with a width of:
  1. A.8 Bits
  2. B.16 Bits
  3. C.32 Bits
  4. D.64 Bits
Q279
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 2๐Ÿท๏ธ CX Counter Register RoleEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
In x86/8088 architecture, the CX register is primarily designated and used as a:
๐Ÿ’ป assembly Snippet
mov cx, 10
my_loop:
    loop my_loop
  1. A.Counter register
  2. B.Flag register
  3. C.Base register
  4. D.Destination register
Q280
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 2๐Ÿท๏ธ I/O Address Space Selection via IN/OUT InstructionsEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
Peripheral / I/O address space is selected when which of the following instructions is executed by the processor?
๐Ÿ’ป assembly Snippet
in al, 0x60
  1. A.MOV
  2. B.DEC
  3. C.IN
  4. D.ADD