Ch 02: 16-Bit Segmented Memory Model & Addressing Modes

395 Questions395 MCQs0 Short Questions0 Long Questions
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CS401 - Computer Architecture and Assembly Language Programming Examination Practice

Timed practice exam simulation for CS401 - Computer Architecture and Assembly Language Programming.

๐Ÿ“˜ VU MID TERM EXAMLectures 1 to 22
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Covers syllabus of Lectures 1 to 22 with 30 high-yield MCQs in a timed exam environment.

๐Ÿ“30 MCQs
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๐Ÿ“— VU FINAL TERM EXAMLectures 23 to 45
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Final Term Examination

Comprehensive semester exam preparation with 45 MCQs covering Lectures 23 to 45 with complete course coverage.

๐Ÿ“45 MCQs
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Showing 301 โ€“ 310 of 395 Questions
Page 31 of 40
Q301
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 2๐Ÿท๏ธ 2.7. Stack OperationsEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
In x86 memory segmentation, the physical address of the current top of the stack is obtained using which segment and offset register combination?
  1. A.SS:SI combination
  2. B.SS:SP combination
  3. C.ES:BP combination
  4. D.ES:SP combination
Q302
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 2๐Ÿท๏ธ 2.8. Addressing Modes SummaryEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
All memory addressing mechanisms in iAPX88 architecture calculate and return an offset value known as the:
๐Ÿ’ป assembly Snippet
mov ax, [bx+si+4]  ; Effective Address = BX + SI + 4
  1. A.Effective address
  2. B.Faulty address
  3. C.Indirect address
  4. D.Direct address
Q303
๐Ÿง  Long Problem๐Ÿ“˜ CS401๐Ÿ“‘ Lec 2๐Ÿท๏ธ 2.1. Memory AccessHard๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
Given a memory operand expression [BX + 0x0100] with register values BX = 0x0100 and DS = 0xFFF0, calculate the resulting 20-bit physical memory address.
๐Ÿ’ป assembly Snippet
mov ax, [bx + 0x0100]
Q304
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 2๐Ÿท๏ธ 2.7. Indirect Memory AccessEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
In 8088 real mode architecture, the logical memory address for stack operations is derived using which register pair?
  1. A.SS:SP combination
  2. B.SS:SI combination
  3. C.ES:BP combination
  4. D.ES:SP combination
Q305
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 2๐Ÿท๏ธ 2.7. Stack OperationsEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
In 8088 architecture, whenever a 16-bit word element is pushed onto the stack, how is the Stack Pointer (SP) updated?
๐Ÿ’ป assembly Snippet
push ax
  1. A.SP is decremented by 1
  2. B.SP is decremented by 2
  3. C.SP is decremented by 3
  4. D.SP is decremented by 4
Q306
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 2๐Ÿท๏ธ 2.1. Segment RegistersEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
The assembly instruction 'MOV [BP], AL' copies a 1-byte value from AL into the memory offset specified by BP within which default segment?
๐Ÿ’ป assembly Snippet
mov [bp], al  ; Addresses memory at SS:BP
  1. A.Stack segment
  2. B.Code segment
  3. C.Data segment
  4. D.Extra segment
Q307
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 2๐Ÿท๏ธ 2.7. Stack OperationsEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
In 8088 CPU architecture, stack PUSH and POP instructions operate strictly on data elements of what size?
๐Ÿ’ป assembly Snippet
push ax  ; Pushes 16-bit word element
  1. A.Word sized elements
  2. B.Byte sized elements
  3. C.Double word sized elements
  4. D.Nibble sized elements
Q308
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 2๐Ÿท๏ธ 2.1. Memory AccessEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
In the assembly statement 'total: dw 0', what role does the identifier 'total' serve?
๐Ÿ’ป assembly Snippet
total: dw 0
  1. A.Literal
  2. B.Variable
  3. C.Label
  4. D.Starting point
Q309
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 2๐Ÿท๏ธ 2.7. Stack OperationsEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
The Stack Pointer (SP) register is a memory pointer that is modified indirectly by a specific set of stack manipulation ________.
๐Ÿ’ป assembly Snippet
push ax  ; Decrements SP by 2
pop ax   ; Increments SP by 2
  1. A.Instructions (e.g., PUSH, POP, CALL, RET)
  2. B.Pointers
  3. C.Indexes
  4. D.Variables
Q310
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 2๐Ÿท๏ธ 2.1. Segment RegistersEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
Which memory pointer register is specially designed to hold offset addresses referencing parameters and local variables within the stack segment?
๐Ÿ’ป assembly Snippet
mov ax, [bp+4]  ; Access stack parameter relative to BP
  1. A.SP
  2. B.BP
  3. C.PB
  4. D.AC