Ch 17: Secondary Storage and Device Drivers

Comprehensive capstone module covering cylinder-head-sector addressing, low-level disk sector reading/writing via INT 13h, boot sector layout, and assembling character device drivers.

183 Questions183 MCQs0 Short Questions0 Long Questions

🎯 Exam Practice Papers

CS401 - Computer Architecture and Assembly Language Programming Examination Practice

Timed practice exam simulation for CS401 - Computer Architecture and Assembly Language Programming.

Showing 1 – 10 of 183 Questions

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🧠 Long Problem📘 CS401📑 Lec 17🏷️ 17.2. Sun SPARC ProcessorMedium⭐💡📄🎓VU🏛️VU

Write the main architectural characteristics of the Sun SPARC processor.

💻 assembly Snippet

add r2, r3, r4
ldsb [rn], rn

📝 Short Q📘 CS401📑 Lec 17🏷️ SUN SPARC Processor ArchitectureMedium💡📄🎓VU🏛️VU

List any two load instructions used in the Sun SPARC processor architecture.

📝 Short Q📘 CS401📑 Lec 17🏷️ Processor Architectures OverviewEasy💡📄🎓VU🏛️VU

List three major computer architectures discussed in assembly language programming and compare their design philosophy.

🧠 Long Problem📘 CS401📑 Lec 17🏷️ Motorola 68K Processor ArchitectureHard🔁⭐💡📄🎓VU🏛️VU

Detail the major data movement and arithmetic instructions used in the Motorola 68000 (68K) processor architecture, including their syntax and operand rules.

💻 assembly Snippet

MOVE.L D0, D1
ADD.W D2, D1

❓ MCQ📘 CS401📑 Lec 17🏷️ Motorola 68K Processor Architecture and Program CounterMedium🔁⭐💡📄🎓VU🏛️VU

What is the bit width of the Program Counter (PC) register in the Motorola 68000 (68K) processor family?

A.8 bits
B.16 bits
C.32 bits
D.64 bits

❓ MCQ📘 CS401📑 Lec 17🏷️ Motorola 68K RegistersEasy🔁⭐📄🎓VU🏛️VU

In Motorola 68K processors, what is the mnemonic name of the 32-bit register that tracks the memory address of the next instruction byte to be executed?

A.PC (Program Counter)
B.RET (Return)
C.IDT (Interrupt Descriptor Table)
D.IVT (Interrupt Vector Table)

❓ MCQ📘 CS401📑 Lec 17🏷️ Motorola 68K Processor Architecture and RegistersMedium🔁⭐💡📄🎓VU🏛️VU

How many 32-bit general-purpose registers (data registers D0–D7 and address registers A0–A7 combined) are available in the Motorola 68000 (68K) processor architecture?

A.4
B.8
C.16
D.32

❓ MCQ📘 CS401📑 Lec 17🏷️ Motorola 68K Processor Architecture and Program CounterMedium🔁⭐💡📄🎓VU🏛️VU

In Motorola 68K processors, what is the bit width of the Program Counter (PC) register that holds the memory address of the currently executing instruction?

A.8-bit
B.16-bit
C.32-bit
D.64-bit

❓ MCQ📘 CS401📑 Lec 17🏷️ Motorola 68K Processor Architecture and RegistersMedium🔁⭐💡📄🎓VU🏛️VU

How many 32-bit general-purpose registers (data registers D0–D7 and address registers A0–A7 combined) are present in the Motorola 68000 processor architecture?

A.4
B.8
C.16
D.32

Q10

📝 Short Q📘 CS401📑 Lec 17🏷️ Number Printing Algorithm and LIFO Stack ReversalMedium🔁⭐💡📄🎓VU🏛️VU

Explain the algorithm for converting an unsigned binary number to printable ASCII characters for display output in 8088 assembly language. Why is the hardware stack essential in this process?

💻 assembly Snippet

mov bx, 10
div bx
add dl, '0'
push dx

Ch 17: Secondary Storage and Device Drivers

CS401 - Computer Architecture and Assembly Language Programming Examination Practice

Mid Term Examination

Final Term Examination

CS401 - Computer Architecture and Assembly Language Programming Examination Practice

Mid Term Examination

Final Term Examination

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