Ch 07: Video Memory & Screen Display

264 Questions264 MCQs0 Short Questions0 Long Questions
๐ŸŽฏ Exam Practice Papers
SEMESTER PASS

CS401 - Computer Architecture and Assembly Language Programming Examination Practice

Timed practice exam simulation for CS401 - Computer Architecture and Assembly Language Programming.

๐Ÿ“˜ VU MID TERM EXAMLectures 1 to 22
โฑ๏ธ 60 Mins

Mid Term Examination

Covers syllabus of Lectures 1 to 22 with 30 high-yield MCQs in a timed exam environment.

๐Ÿ“30 MCQs
โฑ๏ธ60 Minutes
๐Ÿ“— VU FINAL TERM EXAMLectures 23 to 45
โฑ๏ธ 90 Mins

Final Term Examination

Comprehensive semester exam preparation with 45 MCQs covering Lectures 23 to 45 with complete course coverage.

๐Ÿ“45 MCQs
โฑ๏ธ90 Minutes
Showing 1 โ€“ 10 of 264 Questions
Page 1 of 27
Q1
๐Ÿ“ Short Q๐Ÿ“˜ CS401๐Ÿ“‘ Lec 7๐Ÿท๏ธ 7.5. LES and LDS ExampleEasy๐Ÿ”โญ๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
What is the key difference between the LES and LDS instructions in x86 assembly language?
๐Ÿ’ป assembly Snippet
lds si, [farPtr]
les di, [farPtr]
Q2
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 7๐Ÿท๏ธ 7.1. Interrupts and Interrupt HandlingEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
When a number is divided by zero, a 'Divide-by-Zero' interrupt (Vector 0) is generated. Which statement accurately describes how this interrupt is invoked?
๐Ÿ’ป assembly Snippet
MOV BL, 0
DIV BL
  1. A.This interrupt is generated automatically by the CPU
  2. B.INT 0
  3. C.INT 1
  4. D.INT 2
Q3
๐Ÿง  Long Problem๐Ÿ“˜ CS401๐Ÿ“‘ Lec 7๐Ÿท๏ธ 7.1. Interrupts and DebuggingHard๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
Write a complete 8088 assembly language Breakpoint Interrupt Service Routine (INT 3 ISR) that saves the CPU context, accesses the interrupted program's code segment and instruction pointer from the stack, and properly returns execution using the IRET instruction.
๐Ÿ’ป assembly Snippet
debugISR:
    push bp
    mov bp, sp
    push ax
    push bx
    push cx
    push dx
    push si
    push di
    push ds
    push es
    sti
    push cs
    pop ds
    mov ax, [bp+4]
    mov es, ax
Q4
๐Ÿง  Long Problem๐Ÿ“˜ CS401๐Ÿ“‘ Lec 7๐Ÿท๏ธ 7.1. Interrupts and DebuggingHard๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
In an 8088 assembly language Breakpoint Interrupt Handler (INT 3 ISR), explain the purpose of decrementing the return IP address saved on the stack, restoring the original opcode, and displaying the saved CPU register context. Complete and annotate the provided code snippet.
๐Ÿ’ป assembly Snippet
dec word [bp+2]          ; Decrement return address (IP) on stack
mov di, [bp+2]           ; Load return offset into DI
mov word [opcodepos], di ; Remember return position
mov al, [opcode]         ; Load original opcode
mov [es:di], al          ; Restore original opcode in memory
mov byte [flag], 0       ; Reset flag
call clrscr              ; Clear screen
mov si, 6                ; Pointer to first saved register at bp+6
mov cx, 12               ; Loop count: 12 registers to display
mov ax, 0                ; Screen row 0
mov bx, 5                ; Screen column 5
push ax                  ; Pass row
push bx                  ; Pass column
mov dx, [bp+si]          ; Fetch register value from stack frame
Q5
๐Ÿง  Long Problem๐Ÿ“˜ CS401๐Ÿ“‘ Lec 7๐Ÿท๏ธ 7.1. Interrupts and DebuggingHard๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
In an 8088 assembly language Breakpoint Interrupt Handler (INT 3 ISR), explain the procedure for printing CPU register names and their corresponding values on the display screen. Annotate and complete the provided assembly code snippet that loops through saved register values on the stack and displays them alongside their 4-character register labels.
๐Ÿ’ป assembly Snippet
push dx         ; number to be printed
call printnum   ; print the number
sub si, 2       ; point to next register
inc ax          ; next row number
loop l3         ; repeat for the 12 registers

mov ax, 0       ; start from row 0
mov bx, 0       ; start from column 0
mov cx, 12      ; total 12 register names
mov si, 4       ; each name length is 4 chars
mov dx, names   ; offset of first name in dx

push ax         ; row number
push bx         ; column number
push dx         ; offset of string
push si         ; length of string
call printstr   ; print the string
add dx, 4       ; point to start of next string
inc ax          ; new row number
Q6
๐Ÿง  Long Problem๐Ÿ“˜ CS401๐Ÿ“‘ Lec 7๐Ÿท๏ธ 7.1. Interrupts and DebuggingHard๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
In 8088 assembly language debugger development, explain how single-step execution is activated using the Trap Flag (TF) inside an Interrupt Service Routine (ISR), and demonstrate how to install INT 1 (Single-Step Interrupt) and INT 3 (Breakpoint Interrupt) handlers into the Interrupt Vector Table (IVT). Annotate and complete the provided assembly code snippet.
๐Ÿ’ป assembly Snippet
or word [bp+6], 0x0100 ; set TF in flags on stack
keywait:
  cmp byte [flag], 0   ; has a key been pressed
  je keywait           ; no, check again
  pop es
  pop ds
  pop di
  pop si
  pop dx
  pop cx
  pop bx
  pop ax
  pop bp
  iret

start:
  xor ax, ax
  mov es, ax           ; point es to IVT base
  mov word [es:1*4], trapisr  ; store offset at 1*4
  mov [es:1*4+2], cs          ; store segment at 1*4+2
  mov word [es:3*4], debugisr ; store offset at 3*4
  mov [es:3*4+2], cs          ; store segment at 3*4+2
  cli                  ; disable interrupts
Q7
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 7๐Ÿท๏ธ 7.1. Dedicated Interrupt VectorsEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
Which x86 dedicated CPU interrupt vector is reserved for Arithmetic Overflow (INTO instruction)?
๐Ÿ’ป assembly Snippet
INTO
  1. A.INT 4
  2. B.INT 1
  3. C.INT 2
  4. D.INT 3
Q8
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 7๐Ÿท๏ธ 7.1. Interrupts and Fault ExceptionsEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
Which of the following is a special type of interrupt fault where the saved return IP points to the same instruction that caused the interrupt rather than the next instruction?
๐Ÿ’ป assembly Snippet
DIV BL
  1. A.Divide overflow interrupt
  2. B.Debug interrupt
  3. C.Arithmetic overflow interrupt
  4. D.Change of sign interrupt
Q9
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 7๐Ÿท๏ธ 7.1. Dedicated Interrupt Vectors and Single-SteppingEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
In x86 assembly language debugging, the Single-Step Interrupt (INT 1) is ________.
๐Ÿ’ป assembly Snippet
PUSHF
POP AX
OR AX, 0x0100
PUSH AX
POPF
  1. A.Like divide by zero interrupt
  2. B.Hardware interrupt
  3. C.Like divide by 1 interrupt
  4. D.Software interrupt
Q10
๐Ÿง  Long Problem๐Ÿ“˜ CS401๐Ÿ“‘ Lec 7๐Ÿท๏ธ 7.2. Interrupt Chaining and TSR ProgrammingMedium๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
What is interrupt chaining? Describe its purpose and execution mechanism.
๐Ÿ’ป assembly Snippet
pushf
call far [old_isr]