Ch 08: String Instructions and Primitives

307 Questions307 MCQs0 Short Questions0 Long Questions
๐ŸŽฏ Exam Practice Papers
SEMESTER PASS

CS401 - Computer Architecture and Assembly Language Programming Examination Practice

Timed practice exam simulation for CS401 - Computer Architecture and Assembly Language Programming.

๐Ÿ“˜ VU MID TERM EXAMLectures 1 to 22
โฑ๏ธ 60 Mins

Mid Term Examination

Covers syllabus of Lectures 1 to 22 with 30 high-yield MCQs in a timed exam environment.

๐Ÿ“30 MCQs
โฑ๏ธ60 Minutes
๐Ÿ“— VU FINAL TERM EXAMLectures 23 to 45
โฑ๏ธ 90 Mins

Final Term Examination

Comprehensive semester exam preparation with 45 MCQs covering Lectures 23 to 45 with complete course coverage.

๐Ÿ“45 MCQs
โฑ๏ธ90 Minutes
Showing 1 โ€“ 10 of 307 Questions
Page 1 of 31
Q1
๐Ÿ“ Short Q๐Ÿ“˜ CS401๐Ÿ“‘ Lec 8๐Ÿท๏ธ 8.1. InterruptsMedium๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
Explain the Divide Overflow Error (Interrupt 0) in x86 Assembly Language.
๐Ÿ’ป assembly Snippet
mov ax, 0x8432
mov bl, 2
div bl
Q2
๐Ÿ“ Short Q๐Ÿ“˜ CS401๐Ÿ“‘ Lec 8๐Ÿท๏ธ 8.1. InterruptsEasyโญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
For what purpose is the INT 4 interrupt reserved in x86 architecture?
๐Ÿ’ป assembly Snippet
add al, 0x7F
into
Q3
๐Ÿ“ Short Q๐Ÿ“˜ CS401๐Ÿ“‘ Lec 8๐Ÿท๏ธ 8.1. InterruptsEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
What is the Trap Flag (TF) in x86 architecture, and what is its primary function?
๐Ÿ’ป assembly Snippet
pushf
pop ax
or ax, 0x0100
push ax
poplf
Q4
๐Ÿ“ Short Q๐Ÿ“˜ CS401๐Ÿ“‘ Lec 8๐Ÿท๏ธ 8.1. InterruptsMedium๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
Why are the Interrupt Flag (IF) and Trap Flag (TF) automatically cleared when an Interrupt Service Routine (ISR) is invoked?
Q5
๐Ÿ“ Short Q๐Ÿ“˜ CS401๐Ÿ“‘ Lec 8๐Ÿท๏ธ 8.1. InterruptsEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
What changes occur in the stack when an INT instruction is executed in x86 assembly language?
๐Ÿ’ป assembly Snippet
int 0x21
Q6
๐Ÿ“ Short Q๐Ÿ“˜ CS401๐Ÿ“‘ Lec 8๐Ÿท๏ธ 8.2. Hooking an InterruptMedium๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
Why are CLI and STI instructions used when hooking an interrupt in x86 assembly language?
๐Ÿ’ป assembly Snippet
cli
mov [es:0x20*4], offset my_isr
mov [es:0x20*4+2], cs
sti
Q7
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 8๐Ÿท๏ธ 8.1. InterruptsEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
Which x86 software interrupt is dedicated to handling arithmetic overflow conditions (triggered by the INTO instruction)?
๐Ÿ’ป assembly Snippet
add ax, bx
into
  1. A.INT 1
  2. B.INT 2
  3. C.INT 3
  4. D.INT 4
Q8
๐Ÿง  Long Problem๐Ÿ“˜ CS401๐Ÿ“‘ Lec 8๐Ÿท๏ธ 8.2. Hooking an InterruptHard๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
Write a complete x86 assembly language program to hook and implement a custom 'Break Interrupt Service Routine' (INT 1 / INT 3 Breakpoint Interrupt) that displays a message on screen when triggered.
๐Ÿ’ป assembly Snippet
int 3
Q9
๐Ÿ“ Short Q๐Ÿ“˜ CS401๐Ÿ“‘ Lec 8๐Ÿท๏ธ 8.1. InterruptsEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
When an Interrupt Service Routine (ISR) finishes execution, how does the x86 CPU restore processor context and resume execution of the interrupted program?
๐Ÿ’ป assembly Snippet
iret
Q10
๐Ÿ“ Short Q๐Ÿ“˜ CS401๐Ÿ“‘ Lec 8๐Ÿท๏ธ 8.1. InterruptsEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
At which physical memory address in the Interrupt Vector Table (IVT) is the 4-byte segment:offset interrupt vector for INT 10h stored?
๐Ÿ’ป assembly Snippet
mov ax, [0x0040] ; INT 10h Offset
mov dx, [0x0042] ; INT 10h Segment