Ch 02: 16-Bit Segmented Memory Model & Addressing Modes

395 Questions395 MCQs0 Short Questions0 Long Questions
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CS401 - Computer Architecture and Assembly Language Programming Examination Practice

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๐Ÿ“˜ VU MID TERM EXAMLectures 1 to 22
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Covers syllabus of Lectures 1 to 22 with 30 high-yield MCQs in a timed exam environment.

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๐Ÿ“— VU FINAL TERM EXAMLectures 23 to 45
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Comprehensive semester exam preparation with 45 MCQs covering Lectures 23 to 45 with complete course coverage.

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Showing 311 โ€“ 320 of 395 Questions
Page 32 of 40
Q311
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 2๐Ÿท๏ธ 2.1. Memory AccessEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
What is the maximum physical memory capacity directly addressable by the iAPX88 (8088) processor?
  1. A.1 MB
  2. B.2 MB
  3. C.3 MB
  4. D.128 MB
Q312
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 2๐Ÿท๏ธ 2.1. Memory AccessEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
The 8088 processor accesses its maximum 1 MB physical memory space using an address bus of what width?
  1. A.18 bits
  2. B.20 bits
  3. C.16 bits
  4. D.2 bits
Q313
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 2๐Ÿท๏ธ 2.1. Memory AccessEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
In 8088 memory architecture, an absolute location identifier such as 0x1DED0 (where instruction opcode 0xB80500 resides) is classified as a:
  1. A.Physical memory address
  2. B.Logical segment address
  3. C.Effective address
  4. D.None of the given options
Q314
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 2๐Ÿท๏ธ 2.1. Memory AccessMedium๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
When converting 16-bit Segment and Offset addresses into a 20-bit physical address, the calculation is performed as: (Segment Address with lower 4 bits zero) + (Offset Address with ________ 4 bits zero) = 20-bit Physical Address.
๐Ÿ’ป assembly Snippet
; Physical Address Calculation:
; Segment 0x1DED -> 0x1DED0 (lower 4 bits zero)
; Offset  0x0005 -> 0x00005 (upper 4 bits zero)
; Sum            -> 0x1DED5
  1. A.Middle
  2. B.Lower
  3. C.Top
  4. D.Upper
Q315
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 2๐Ÿท๏ธ 2.1. Memory AccessEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
When combining segment and offset addresses, if the addition generates a 20-bit overflow carry bit, the carry is discarded without being stored. This phenomenon is known as address ________.
  1. A.Wraparound
  2. B.Mode
  3. C.Ping
  4. D.Error
Q316
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 2๐Ÿท๏ธ 2.1. Memory AccessEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
In 8088 segmented memory architecture, memory segments can only begin at 16-byte physical memory boundaries, which are known as ________ boundaries.
  1. A.Segment boundaries
  2. B.Paragraph boundaries
  3. C.Cell boundaries
  4. D.RAM boundaries
Q317
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 2๐Ÿท๏ธ 2.1. Memory AccessEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
When a program initializes segment registers CS, DS, SS, and ES to the exact same base address, what is this memory structure called?
  1. A.Equal memory
  2. B.Overlapping segments
  3. C.Segment hiding
  4. D.Overlapping index
Q318
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 2๐Ÿท๏ธ 2.2. Data Definition DirectivesEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
In assembly language data definitions, what is the allocated memory size of a variable declared with 'num1: db 5'?
๐Ÿ’ป assembly Snippet
num1: db 5
  1. A.1 byte
  2. B.4 bits
  3. C.16 bits
  4. D.2 bytes
Q319
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 2๐Ÿท๏ธ 2.3. Addressing ModesEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
In 8088 assembly language, which addressing mode is used by the instruction 'MOV AX, BX'?
๐Ÿ’ป assembly Snippet
mov ax, bx
  1. A.Immediate addressing
  2. B.Indirect addressing
  3. C.Direct addressing
  4. D.Register addressing
Q320
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 2๐Ÿท๏ธ 2.3. Addressing ModesEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
In 8088 assembly language, which addressing mode is used by the instruction 'MOV AX, [BX]'?
๐Ÿ’ป assembly Snippet
mov ax, [bx]
  1. A.Based Register Indirect addressing
  2. B.Indirect addressing
  3. C.Base Indirect addressing
  4. D.Immediate addressing