Ch 09: Software Interrupts and DOS/BIOS Services

174 Questions174 MCQs0 Short Questions0 Long Questions
๐ŸŽฏ Exam Practice Papers
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CS401 - Computer Architecture and Assembly Language Programming Examination Practice

Timed practice exam simulation for CS401 - Computer Architecture and Assembly Language Programming.

๐Ÿ“˜ VU MID TERM EXAMLectures 1 to 22
โฑ๏ธ 60 Mins

Mid Term Examination

Covers syllabus of Lectures 1 to 22 with 30 high-yield MCQs in a timed exam environment.

๐Ÿ“30 MCQs
โฑ๏ธ60 Minutes
๐Ÿ“— VU FINAL TERM EXAMLectures 23 to 45
โฑ๏ธ 90 Mins

Final Term Examination

Comprehensive semester exam preparation with 45 MCQs covering Lectures 23 to 45 with complete course coverage.

๐Ÿ“45 MCQs
โฑ๏ธ90 Minutes
Showing 1 โ€“ 10 of 174 Questions
Page 1 of 18
Q1
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 9๐Ÿท๏ธ 9.2. I/O PortsEasy๐Ÿ”โญ๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
The source register in the OUT instruction is:
  1. A.AL or AX
  2. B.BL or BX
  3. C.CL or CX
  4. D.DL or DX
Q2
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 9๐Ÿท๏ธ 9.5. Parallel PortMedium๐Ÿ”โญ๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
Which of the following pins of the parallel port are grounded?
  1. A.10-18
  2. B.18-25
  3. C.25-32
  4. D.None of the above
Q3
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 9๐Ÿท๏ธ 9.1. Hardware InterruptsEasy๐Ÿ”โญ๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
Which of the following IRQ lines is designated as the cascading interrupt?
  1. A.IRQ 0
  2. B.IRQ 1
  3. C.IRQ 2
  4. D.IRQ 3
Q4
๐Ÿ“ Short Q๐Ÿ“˜ CS401๐Ÿ“‘ Lec 9๐Ÿท๏ธ 9.2. I/O PortsEasy๐Ÿ”โญ๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
Provide valid x86 assembly instruction(s) to read an 8-bit value from I/O port number 0x312.
๐Ÿ’ป assembly Snippet
mov dx, 0x312
in al, dx
Q5
๐Ÿ“ Short Q๐Ÿ“˜ CS401๐Ÿ“‘ Lec 9๐Ÿท๏ธ 9.2. I/O PortsEasy๐Ÿ”โญ๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
Provide valid x86 assembly instruction(s) to write the 8-bit value of the AL register to I/O port address 0x12.
๐Ÿ’ป assembly Snippet
out 0x12, al
Q6
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 9๐Ÿท๏ธ 9.1. Interrupt Controller (8259 PIC)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
Which of the following hardware IRQs functions as the cascading interrupt line between the Master and Slave 8259 Programmable Interrupt Controllers (PIC)?
  1. A.IRQ 0
  2. B.IRQ 1
  3. C.IRQ 2
  4. D.IRQ 3
Q7
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 9๐Ÿท๏ธ 9.1. Interrupt Controller (8259 PIC)Medium๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
In hardware interrupt processing, an End of Interrupt (EOI) command signal is sent to the 8259 PIC by which component?
๐Ÿ’ป assembly Snippet
mov al, 0x20
out 0x20, al
  1. A.Handler
  2. B.Processor
  3. C.IRQ
  4. D.PIC
Q8
๐Ÿ“ Short Q๐Ÿ“˜ CS401๐Ÿ“‘ Lec 9๐Ÿท๏ธ 9.1. Interrupt Controller (8259 PIC)Medium๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
Explain the purpose and working of the following assembly code segment. Also, write instruction-level comments describing the purpose of each instruction: [org 0x0100] jmp start count: dw 0 attribute: dw 0x07 second: dw 0 timer: push di push cx push ax push es inc word[cs:count] cmp word[cs:count], 91 je clrscr jmp exit
๐Ÿ’ป assembly Snippet
[org 0x0100]
jmp start
count: dw 0
attribute: dw 0x07
second: dw 0
timer:
    push di
    push cx
    push ax
    push es
    inc word[cs:count]
    cmp word[cs:count], 91
    je clrscr
    jmp exit
Q9
๐Ÿง  Long Problem๐Ÿ“˜ CS401๐Ÿ“‘ Lec 9๐Ÿท๏ธ 9.3. Terminate and Stay Resident (TSR) ProgramsHard๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
Explain the purpose and line-by-line working of the following TSR (Terminate and Stay Resident) interrupt service routine and initialization code segment. Also, write instruction-level comments for each line: clrscr: mov word [cs:count], 0 mov ax, 0xb800 mov es, ax xor di, di mov al, 0x20 add word [cs:attribute], 0x10 cmp word [cs:attribute], 0x77 jbe next mov word [cs:attribute], 0x07 next: mov ah, [cs:attribute] mov cx, 2000 cld rep stosw exit: mov al, 0x20 out 0x20, al pop es pop ax pop cx pop di iret start: xor ax, ax mov es, ax cli mov word [es:8*4], timer mov [es:8*4+2], cs sti mov dx, start add dx, 15 mov cl, 4 shr dx, cl mov ax, 0x3100 int 0x21
๐Ÿ’ป assembly Snippet
clrscr:
    mov word [cs:count], 0
    mov ax, 0xb800
    mov es, ax
    xor di, di
    mov al, 0x20
    add word [cs:attribute], 0x10
    cmp word [cs:attribute], 0x77
    jbe next
    mov word [cs:attribute], 0x07

next:
    mov ah, [cs:attribute]
    mov cx, 2000
    cld
    rep stosw

exit:
    mov al, 0x20
    out 0x20, al
    pop es
    pop ax
    pop cx
    pop di
    iret

start:
    xor ax, ax
    mov es, ax
    cli
    mov word [es:8*4], timer
    mov [es:8*4+2], cs
    sti
    mov dx, start
    add dx, 15
    mov cl, 4
    shr dx, cl
    mov ax, 0x3100
    int 0x21
Q10
๐Ÿ“ Short Q๐Ÿ“˜ CS401๐Ÿ“‘ Lec 9๐Ÿท๏ธ 9.1. Interrupt Controller (8259 PIC)Medium๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
Which hardware component interrupts the system 18.2 times per second in x86 architecture? Explain its mechanism and list some of its primary practical uses.
๐Ÿ’ป assembly Snippet
; INT 8 is invoked 18.2 times per second by PIT IRQ 0