Ch 02: 16-Bit Segmented Memory Model & Addressing Modes

395 Questions395 MCQs0 Short Questions0 Long Questions
๐ŸŽฏ Exam Practice Papers
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CS401 - Computer Architecture and Assembly Language Programming Examination Practice

Timed practice exam simulation for CS401 - Computer Architecture and Assembly Language Programming.

๐Ÿ“˜ VU MID TERM EXAMLectures 1 to 22
โฑ๏ธ 60 Mins

Mid Term Examination

Covers syllabus of Lectures 1 to 22 with 30 high-yield MCQs in a timed exam environment.

๐Ÿ“30 MCQs
โฑ๏ธ60 Minutes
๐Ÿ“— VU FINAL TERM EXAMLectures 23 to 45
โฑ๏ธ 90 Mins

Final Term Examination

Comprehensive semester exam preparation with 45 MCQs covering Lectures 23 to 45 with complete course coverage.

๐Ÿ“45 MCQs
โฑ๏ธ90 Minutes
Showing 81 โ€“ 90 of 395 Questions
Page 9 of 40
Q81
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 2๐Ÿท๏ธ 2.1. Register Architecture (CX Count Register Primary Purpose)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
In x86 register architecture, the general-purpose `CX` register is primarily used as a __________.
๐Ÿ’ป assembly Snippet
mov cx, 10 ; Set loop iteration count to 10
my_loop:
  ; loop body
  loop my_loop ; Decrements CX and jumps if CX != 0
  1. A.Counter register
  2. B.Flag register
  3. C.Base register
  4. D.Destination register
Q82
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 2๐Ÿท๏ธ 2.1. Basic Processor Concepts (Register Operand Holding Function)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
What is the primary function of a CPU register?
  1. A.Hold the operand
  2. B.Hold the operator
  3. C.Hold both the operator and operand
  4. D.None of the given
Q83
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 2๐Ÿท๏ธ 2.1. Basic Processor Concepts (Registers as Internal Memory Cells)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
Registers are like a scratchpad RAM inside the processor, and their operational behavior is very much like normal __________.
  1. A.Number
  2. B.operations
  3. C.memory cells
  4. D.None of the Given
Q84
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 2๐Ÿท๏ธ 2.1. Basic Processor Concepts (Accumulator Register and Word Size)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
There is a central register in every processor called the __________ and the native word size of a processor is defined by the width of its __________.
  1. A.accumulator, accumulator
  2. B.data bus, accumulator
  3. C.accumulator, Address Bus
  4. D.accumulator, memory
Q85
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 2๐Ÿท๏ธ 2.1. Register Architecture (Address Registers: Pointer, Index, and Base Registers)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
Which group of registers does not hold raw data values directly, but instead holds the memory offset addresses of data?
  1. A.Pointer, Segment, or Base Register
  2. B.Pointer, Index, or Base Register
  3. C.General Registers
  4. D.Instruction Pointer
Q86
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 2๐Ÿท๏ธ 2.1. Basic Processor Concepts (Instruction Pointer / Program Counter Function)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
The program counter (Instruction Pointer) holds the offset memory address of the next instruction to be __________.
  1. A.executed
  2. B.called
  3. C.deleted
  4. D.copy
Q87
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 2๐Ÿท๏ธ 2.1. Basic Processor Concepts (8088 Register Width 16 Bits)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
The Intel 8088 is a 16-bit microprocessor with its primary accumulator and internal registers having a width of __________.
  1. A.32 bits
  2. B.6 bits
  3. C.16 bits
  4. D.64 bits
Q88
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 2๐Ÿท๏ธ 2.1. Basic Processor Concepts (Computer Architecture Definition)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
The __________ of a processor defines the physical organization, word size, functionalities of internal registers, and the set of valid machine instructions supported by the CPU.
  1. A.Manufactures
  2. B.architecture
  3. C.Deal
  4. D.None of the Given
Q89
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 2๐Ÿท๏ธ 2.1. Processor History and Architecture (Intel iAPX88 Age)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
Historically, the Intel iAPX88 / 8088 architecture was introduced over __________ years ago.
  1. A.More than 25 old
  2. B.New
  3. C.Not Good
  4. D.None of the Given
Q90
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 2๐Ÿท๏ธ 2.1. Register Architecture (General Purpose Data Registers AX, BX, CX, DX)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
Which group of registers constitutes the primary 16-bit general-purpose registers in x86 architecture?
  1. A.AX, BX, CX, and DX
  2. B.XA, BX, CX, and DX
  3. C.SS, SI and DI
  4. D.3