Ch 02: 16-Bit Segmented Memory Model & Addressing Modes

395 Questions395 MCQs0 Short Questions0 Long Questions
๐ŸŽฏ Exam Practice Papers
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CS401 - Computer Architecture and Assembly Language Programming Examination Practice

Timed practice exam simulation for CS401 - Computer Architecture and Assembly Language Programming.

๐Ÿ“˜ VU MID TERM EXAMLectures 1 to 22
โฑ๏ธ 60 Mins

Mid Term Examination

Covers syllabus of Lectures 1 to 22 with 30 high-yield MCQs in a timed exam environment.

๐Ÿ“30 MCQs
โฑ๏ธ60 Minutes
๐Ÿ“— VU FINAL TERM EXAMLectures 23 to 45
โฑ๏ธ 90 Mins

Final Term Examination

Comprehensive semester exam preparation with 45 MCQs covering Lectures 23 to 45 with complete course coverage.

๐Ÿ“45 MCQs
โฑ๏ธ90 Minutes
Showing 51 โ€“ 60 of 395 Questions
Page 6 of 40
Q51
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 2๐Ÿท๏ธ 2.1. Basic Processor Concepts (Data Movement Instructions Definition)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
True or False: Data movement instructions (such as `MOV`, `PUSH`, `POP`, `IN`, `OUT`) are specifically used to transfer data from one location to another.
๐Ÿ’ป assembly Snippet
mov ax, bx ; Copies data from BX to AX
  1. A.TRUE
  2. B.FALSE
Q52
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 2๐Ÿท๏ธ 2.1. Basic Processor Concepts (MOV Data Movement Instruction)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
The assembly language instruction `MOV` belongs to which instruction group?
๐Ÿ’ป assembly Snippet
mov ax, 5 ; Data movement instruction
  1. A.Arithmetic and Logic Instructions
  2. B.Data Movement Instructions
  3. C.Program Control Instructions
  4. D.Special Instructions
Q53
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 2๐Ÿท๏ธ 2.1. Basic Processor Concepts (Special Instructions Category)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
Which group of processor instructions allows changing specific CPU processor behaviors and operating modes (such as clearing/setting flags or disabling interrupts)?
๐Ÿ’ป assembly Snippet
cli ; Special instruction: Clears Interrupt Flag
cld ; Special instruction: Clears Direction Flag
  1. A.Special Instructions
  2. B.Data Movement Instructions
  3. C.Program Control Instructions
  4. D.Arithmetic and Logic Instructions
Q54
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 2๐Ÿท๏ธ 2.1. Basic Processor Concepts (8088 16-Bit Architecture)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
The Intel 8088 is a 16-bit microprocessor with an accumulator and all general-purpose registers of what bit width?
  1. A.32 bits
  2. B.6 bits
  3. C.16 bits
  4. D.64 bits
Q55
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 2๐Ÿท๏ธ 2.1. Basic Processor Concepts (Processor Architecture Definition)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
The __________ of a processor refers to the organization, layout, and functionality of its internal registers and the instruction set valid for that processor.
  1. A.Manufactures
  2. B.architecture
  3. C.Deal
  4. D.None of the Given
Q56
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 2๐Ÿท๏ธ 2.1. Basic Processor Concepts (iAPX88 Architecture History)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
Historically, the Intel iAPX88 (8088/8086) architecture is __________.
  1. A.More than 25 years old
  2. B.New
  3. C.Not Good
  4. D.None of the Given
Q57
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 2๐Ÿท๏ธ 2.1. Basic Processor Concepts (Instruction Pointer IP)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
In Intel iAPX88 architecture, which special register contains the memory offset address of the next instruction to be executed?
  1. A.AX
  2. B.PI
  3. C.IP
  4. D.SI
Q58
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 2๐Ÿท๏ธ 2.1. Basic Processor Concepts (Code Segment and Instruction Pointer CS:IP)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
By default, the Code Segment register (`CS`) is implicitly associated with which offset register to fetch machine instructions?
  1. A.SS
  2. B.BP
  3. C.CX
  4. D.IP
Q59
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 2๐Ÿท๏ธ 2.1. Basic Processor Concepts (Processor Register Characteristics)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
Which of the following statements is NOT true regarding processor registers in x86 architecture?
  1. A.Registers are located inside the CPU and provide high-speed data access
  2. B.Registers can be accessed much faster than system RAM memory
  3. C.Registers are held in secondary storage media like hard drives
  4. D.Registers are limited in total number and size
Q60
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 2๐Ÿท๏ธ 2.1. Basic Processor Concepts (Instruction Operands)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
The primary purpose of a processor is to execute machine operations, and all processor operations require __________ to act upon.
  1. A.order
  2. B.nothing
  3. C.operands
  4. D.bit