← CS401 - Computer Architecture and Assembly Language Programming OverviewChapter 4

Ch 04: Bit Manipulation and Shifts

198 Questions198 MCQs0 Short Questions0 Long Questions
🎯 Exam Practice Papers
SEMESTER PASS

CS401 - Computer Architecture and Assembly Language Programming Examination Practice

Timed practice exam simulation for CS401 - Computer Architecture and Assembly Language Programming.

📘 VU MID TERM EXAMLectures 1 to 22
⏱️ 60 Mins

Mid Term Examination

Covers syllabus of Lectures 1 to 22 with 30 high-yield MCQs in a timed exam environment.

📝30 MCQs
⏱️60 Minutes
Starter (1 Attempt)1 Attempt
PKR 10
Standard (2 Attempts)2 Attempts
PKR 20Most Popular
Mastery (5 Attempts)5 Attempts
PKR 50Best Value
📘 Take VU Mid Term Exam
📗 VU FINAL TERM EXAMLectures 23 to 45
⏱️ 90 Mins

Final Term Examination

Comprehensive semester exam preparation with 45 MCQs covering Lectures 23 to 45 with complete course coverage.

📝45 MCQs
⏱️90 Minutes
Starter (1 Attempt)1 Attempt
PKR 10
Standard (2 Attempts)2 Attempts
PKR 20Most Popular
Mastery (5 Attempts)5 Attempts
PKR 50Best Value
📗 Take VU Final Term Exam
Showing 91 – 100 of 198 Questions
Page 10 of 20
Q91
❓ MCQ📘 CS401📑 Lec 4🏷️ 4.1. Addressing Modes (Illegal Index-Index Register Combination)Easy🔁⭐💡📄🎓VU🏛️VU
Why is the assembly instruction `mov ax, [SI + DI]` invalid in 16-bit x86 architecture?
💻 assembly Snippet
; mov ax, [si + di] ; ILLEGAL: Combining two index registers
mov ax, [bx + si] ; LEGAL: Base register BX + Index register SI
  1. A.Two index registers cannot be combined in an addressing mode
  2. B.Two base registers cannot be combined in an addressing mode
  3. C.Source register must be AX
  4. D.Immediate operand is required
Q92
❓ MCQ📘 CS401📑 Lec 4🏷️ 4.1. Addressing Modes (Illegal Index-Index Combination)Easy🔁⭐💡📄🎓VU🏛️VU
In the assembly instruction `mov ax, [SI + DI]`, what is the specific assembler error?
💻 assembly Snippet
; mov ax, [si + di] ; ILLEGAL: Cannot use two index registers together
mov ax, [bx + si] ; LEGAL: One base register + one index register
  1. A.Two indexes can't be used as Memory Address
  2. B.Index can't be used as Memory Address
  3. C.Segment register missing
  4. D.None of the Given
Q93
❓ MCQ📘 CS401📑 Lec 4🏷️ 4.1. Segmented Memory Model (8088 Maximum Memory 1MB)Easy🔁⭐💡📄🎓VU🏛️VU
What is the maximum physical memory capacity that the Intel iAPX88 (8088) processor can directly address?
  1. A.1MB
  2. B.2MB
  3. C.3MB
  4. D.128MB
Q94
❓ MCQ📘 CS401📑 Lec 4🏷️ 4.1. Segmented Memory Model (20-Bit Physical Address Bus)Easy🔁⭐💡📄🎓VU🏛️VU
The maximum physical memory capacity of 1 MB in the Intel iAPX88 (8088) processor is accessed using a bus width of __________.
  1. A.18 bits
  2. B.20 bits
  3. C.16 bits
  4. D.2 bits
Q95
❓ MCQ📘 CS401📑 Lec 4🏷️ 4.1. Segmented Memory Model (Physical Memory Address Format)Easy🔁⭐💡📄🎓VU🏛️VU
In the statement 'Address 1DED0 where opcode B80500 is placed', 0x1DED0 represents a 20-bit __________ address in physical RAM.
  1. A.physical memory
  2. B.memory
  3. C.effective
  4. D.None of the Given
Q96
❓ MCQ📘 CS401📑 Lec 4🏷️ 4.1. Segmented Memory Model (Physical Address Calculation Mechanics)Easy🔁⭐💡📄🎓VU🏛️VU
A 20-bit physical address is formed by taking a 16-bit Segment Address with its lower four bits shifted to zero and adding a 16-bit Offset Address with its __________ four bits padded with zero.
💻 assembly Snippet
; Physical Address = (Segment * 16) + Offset
  1. A.Middle
  2. B.lower
  3. C.Top
  4. D.upper
Q97
❓ MCQ📘 CS401📑 Lec 4🏷️ 4.1. Segmented Memory Model (Address Wraparound Phenomenon)Easy🔁⭐💡📄🎓VU🏛️VU
When adding two 20-bit addresses in 8088 real mode, if a 21st carry bit is generated, it is discarded, causing address calculation to loop back to 0x00000. This phenomenon is called address __________.
💻 assembly Snippet
; Segment 0xFFFF, Offset 0x0010 -> 0x100000 -> 0x00000 (Wraparound)
  1. A.wraparound
  2. B.mode
  3. C.ping
  4. D.error
Q98
❓ MCQ📘 CS401📑 Lec 4🏷️ 4.1. Segmented Memory Model (Paragraph Boundary Alignment)Easy🔁⭐💡📄🎓VU🏛️VU
In x86 8088 segmented memory architecture, memory segments can only begin at physical address multiples of 16 bytes, which are called __________ boundaries.
  1. A.segment
  2. B.paragraph
  3. C.cell
  4. D.RAM
Q99
❓ MCQ📘 CS401📑 Lec 4🏷️ 4.1. Segmented Memory Model (Overlapping Segments / Tiny Model)Easy🔁⭐💡📄🎓VU🏛️VU
In a program where Code Segment (`CS`), Data Segment (`DS`), Stack Segment (`SS`), and Extra Segment (`ES`) all contain the exact same segment base value, this memory organization is called __________.
💻 assembly Snippet
; Initializing all segment registers to CS segment base
mov ax, cs
mov ds, ax
mov es, ax
mov ss, ax
  1. A.equal memory
  2. B.overlapping segments
  3. C.segments hiding
  4. D.overlapping SI
Q100
❓ MCQ📘 CS401📑 Lec 4🏷️ 4.1. Addressing Modes (Effective Address Definition)Easy🔁⭐💡📄🎓VU🏛️VU
In base + offset addressing modes, the calculated 16-bit offset address resulting from adding the base register and offset displacement is called the __________.
💻 assembly Snippet
mov ax, [bx + 4] ; Effective Address EA = BX + 4
  1. A.Address
  2. B.mode
  3. C.effective address
  4. D.Physical Address

📖 Related CS401 - Computer Architecture and Assembly Language Programming Curriculum Units

Continue practicing topic-wise multiple choice questions from adjacent examination units.

View All CS401 - Computer Architecture and Assembly Language Programming Chapters →
Ch 01: Introduction to Assembly Language387 QsCh 02: 16-Bit Segmented Memory Model & Addressing Modes395 QsCh 03: Branching, Loops and Program Flow261 QsCh 05: Subroutines and Stack Architecture222 QsCh 06: Parameter Passing and Stack Frames216 QsCh 07: Video Memory & Screen Display264 Qs