Ch 04: Bit Manipulation and Shifts

198 Questions198 MCQs0 Short Questions0 Long Questions
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CS401 - Computer Architecture and Assembly Language Programming Examination Practice

Timed practice exam simulation for CS401 - Computer Architecture and Assembly Language Programming.

๐Ÿ“˜ VU MID TERM EXAMLectures 1 to 22
โฑ๏ธ 60 Mins

Mid Term Examination

Covers syllabus of Lectures 1 to 22 with 30 high-yield MCQs in a timed exam environment.

๐Ÿ“30 MCQs
โฑ๏ธ60 Minutes
๐Ÿ“— VU FINAL TERM EXAMLectures 23 to 45
โฑ๏ธ 90 Mins

Final Term Examination

Comprehensive semester exam preparation with 45 MCQs covering Lectures 23 to 45 with complete course coverage.

๐Ÿ“45 MCQs
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Showing 111 โ€“ 120 of 198 Questions
Page 12 of 20
Q111
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 4๐Ÿท๏ธ 4.1. Segmented Memory Model (1 MB Physical Memory Limit)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
What is the maximum amount of physical RAM memory that an Intel 8088 / iAPX88 microprocessor can directly address?
  1. A.1MB
  2. B.2MB
  3. C.3MB
  4. D.128MB
Q112
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 4๐Ÿท๏ธ 4.1. Segmented Memory Model (20-Bit Physical Address Bus)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
The 1 MB physical memory address space of the Intel 8088 / iAPX88 processor requires an address bus width of:
  1. A.18 bits
  2. B.20 bits
  3. C.16 bits
  4. D.2 bits
Q113
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 4๐Ÿท๏ธ 4.1. Segmented Memory Model (Physical Memory Address Definition)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
In segmented memory calculations, the address `1DED0` (which uniquely identifies a byte location in RAM containing machine instruction opcodes like `B80500`) represents a __________.
๐Ÿ’ป assembly Snippet
; Segment 1DEDh * 16 + Offset 0000h = Physical Address 1DED0h
  1. A.physical memory address
  2. B.memory offset
  3. C.effective address
  4. D.None of the Given
Q114
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 4๐Ÿท๏ธ 4.1. Segmented Memory Model (Segment and Offset Physical Address Calculation)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
To convert 16-bit Segment and Offset addresses into a 20-bit Physical Address: the Segment Address shifted left (lower four bits zero) is added to the Offset Address padded with its __________ four bits as zero.
๐Ÿ’ป assembly Snippet
; Physical Address = (Segment << 4) + Offset
  1. A.Middle
  2. B.lower
  3. C.Top
  4. D.upper
Q115
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 4๐Ÿท๏ธ 4.1. Segmented Memory Model (Address Wraparound Mechanics)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
When calculating a 20-bit physical address from a Segment:Offset pair, if an arithmetic overflow carry beyond bit 19 is generated, it is discarded without being stored. What is this phenomenon called?
๐Ÿ’ป assembly Snippet
; Example: FFFFh:0010h = FFFF0h + 0010h = 100000h -> Wraps around to 00000h
  1. A.wraparound
  2. B.mode
  3. C.ping
  4. D.error
Q116
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 4๐Ÿท๏ธ 4.1. Segmented Memory Model (Paragraph Boundary Alignment)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
In x86 real mode segmented memory architecture, memory segments can only begin at 16-byte aligned memory addresses called __________ boundaries.
  1. A.paragraph
  2. B.segment
  3. C.Cell
  4. D.RAM
Q117
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 4๐Ÿท๏ธ 4.1. Segmented Memory Model (Overlapping Segments Concept)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
When all four segment registers (`CS`, `DS`, `SS`, and `ES`) contain the exact same base segment selector value in a program, this memory layout configuration is called __________.
๐Ÿ’ป assembly Snippet
mov ax, cs
mov ds, ax
mov ss, ax
mov es, ax ; All segment registers point to same base (Overlapping Segments)
  1. A.equal memory
  2. B.overlapping segments
  3. C.segments hiding
  4. D.overlapping SI
Q118
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 4๐Ÿท๏ธ 4.1. Addressing Modes (Effective Address EA Definition)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
In base + offset memory addressing, the 16-bit offset value calculated as the result of adding the base register value to the displacement is called the __________.
๐Ÿ’ป assembly Snippet
; Effective Address (EA) = Base + Displacement
  1. A.Address
  2. B.mode
  3. C.effective address
  4. D.Physical Address
Q119
๐Ÿ“ Short Q๐Ÿ“˜ CS401๐Ÿ“‘ Lec 4๐Ÿท๏ธ 4.1. Addressing Modes (Direct Memory Addressing Mode Example)Easyโญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
Write a single x86 assembly language instruction to copy the 16-bit contents of the memory location at offset `0025h` in the current data segment into register `AX`.
๐Ÿ’ป assembly Snippet
mov ax, [0025h] ; Copies word from DS:0025h into AX
Q120
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 4๐Ÿท๏ธ Bitwise Shifts and RotationsEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
Suppose register AL contains 5 in decimal. After performing two logical left shift operations on AL, what will be the resulting value?
๐Ÿ’ป assembly Snippet
mov al, 5
shl al, 2
  1. A.5
  2. B.10
  3. C.15
  4. D.20