Write the names and functions of the three CPU flags that are classified as control flags and are NOT used for mathematical operations.
Ch 02: 16-Bit Segmented Memory Model & Addressing Modes
Deep dive into 16-bit real mode memory segmentation (CS, DS, SS, ES), pointer/index registers (SP, BP, SI, DI), and calculating effective physical addresses across memory boundaries.
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CS401 - Computer Architecture and Assembly Language Programming Examination Practice
Timed practice exam simulation for CS401 - Computer Architecture and Assembly Language Programming.
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Which type of jump instruction in 8088 assembly language is absolute rather than position-relative?
The iAPX88 (8088) CPU architecture consists of how many total internal registers?
When two 16-bit numbers are added, the sum can be up to 17 bits long. This extra 17th bit that cannot fit in the 16-bit destination register is stored in the:
The 8088 is a 16-bit processor with its accumulator (AX) and all general registers having a width of:
In NASM 8088 assembly language, the instruction 'MOV byte [num1], 5' is a:
On the system bus architecture, memory address signals always move from the:
In 8088 CPU architecture, the Code Segment (CS) register is implicitly associated with which register by default to fetch instructions?
A 32-bit microprocessor (such as the Intel 80386) features an accumulator register (EAX) with a bit width of:
In NASM assembly language, if the offset address of label 'num1' is 0x0117 and its memory content is 0x0005, then after executing 'MOV BX, num1', register BX will contain: