Ch 02: 16-Bit Segmented Memory Model & Addressing Modes

395 Questions395 MCQs0 Short Questions0 Long Questions
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CS401 - Computer Architecture and Assembly Language Programming Examination Practice

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๐Ÿ“˜ VU MID TERM EXAMLectures 1 to 22
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Covers syllabus of Lectures 1 to 22 with 30 high-yield MCQs in a timed exam environment.

๐Ÿ“30 MCQs
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๐Ÿ“— VU FINAL TERM EXAMLectures 23 to 45
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Final Term Examination

Comprehensive semester exam preparation with 45 MCQs covering Lectures 23 to 45 with complete course coverage.

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Showing 211 โ€“ 220 of 395 Questions
Page 22 of 40
Q211
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 2๐Ÿท๏ธ Address Wraparound in Real ModeMedium๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
When computing a 20-bit physical address, if the addition generates a carry bit beyond the 20th bit (exceeding 1 MB), the carry is dropped and addressing wraps around to address 0x00000. What is this phenomenon called?
  1. A.Address wraparound
  2. B.Address mode
  3. C.Address pinging
  4. D.Address error
Q212
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 2๐Ÿท๏ธ Paragraph Boundaries and Segment AlignmentMedium๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
In 8088 segmented architecture, memory segment bases can only begin at physical addresses divisible by 16 (0x0, 0x10, 0x20, etc.). These 16-byte aligned memory boundaries are called __________ boundaries.
  1. A.Paragraph boundaries
  2. B.Segment boundaries
  3. C.Cell boundaries
  4. D.RAM boundaries
Q213
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 2๐Ÿท๏ธ Overlapping Memory SegmentsEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
In an assembly program, if segment registers CS, DS, SS, and ES all contain the exact same segment base value, what is this memory organization called?
  1. A.Equal memory
  2. B.Overlapping segments
  3. C.Segment hiding
  4. D.Overlapping SI
Q214
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 2๐Ÿท๏ธ DB Directive and Memory AllocationEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
In the assembly language memory allocation directive 'num1: db 5', how many bytes of memory are allocated for 'num1'?
๐Ÿ’ป assembly Snippet
num1: db 5
  1. A.1 byte
  2. B.4 bits
  3. C.16 bits
  4. D.2 bytes
Q215
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 2๐Ÿท๏ธ Register Addressing ModeEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
Which addressing mode is utilized in the assembly instruction 'MOV AX, BX'?
๐Ÿ’ป assembly Snippet
mov ax, bx
  1. A.Immediate addressing mode
  2. B.Indirect addressing mode
  3. C.Direct addressing mode
  4. D.Register addressing mode
Q216
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 2๐Ÿท๏ธ Effective Address CalculationEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
In base + offset addressing, what is the 16-bit offset number resulting from adding the base register and displacement called?
๐Ÿ’ป assembly Snippet
mov ax, [bx + 4]
  1. A.Address
  2. B.Mode
  3. C.Effective address
  4. D.Physical address
Q217
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 2๐Ÿท๏ธ Segment Override PrefixesMedium๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
The instruction 'MOV AX, [CS:BX]' explicitly overrides the default segment association by pairing register BX with which segment register for this single instruction?
๐Ÿ’ป assembly Snippet
mov ax, [cs:bx]
  1. A.CS with BX
  2. B.BX with CS
  3. C.BX with AX
  4. D.None of the given options
Q218
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 2๐Ÿท๏ธ Effective Address CalculationMedium๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
Given BX = 0x0100 and DS = 0xFFF0, what is the calculated Effective Memory Address (EA) for the instruction 'MOV [BX + 0x0100], AX'?
๐Ÿ’ป assembly Snippet
mov [bx + 0x0100], ax
  1. A.0x0020
  2. B.0x0200
  3. C.0x0300
  4. D.0x0002
Q219
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 2๐Ÿท๏ธ Indexed Register Indirect Addressing ModeEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
Which addressing mode is used in the instruction 'MOV [SI], AX'?
๐Ÿ’ป assembly Snippet
mov [si], ax
  1. A.Base Register Indirect addressing mode
  2. B.Indirect addressing mode
  3. C.Indexed Register Indirect addressing mode
  4. D.Immediate addressing mode
Q220
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 2๐Ÿท๏ธ Physical Address Calculation and 20-Bit WraparoundHard๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
Given BX = 0x0100 and DS = 0xFFF0, what is the calculated 20-bit Physical Memory Address for the instruction 'MOV [BX + 0x0100], AX' in a 20-bit real mode address space?
๐Ÿ’ป assembly Snippet
mov [bx + 0x0100], ax
  1. A.0x0020
  2. B.0x0100
  3. C.0x10100
  4. D.0x100100