Ch 05: Subroutines and Stack Architecture

222 Questions222 MCQs0 Short Questions0 Long Questions
๐ŸŽฏ Exam Practice Papers
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CS401 - Computer Architecture and Assembly Language Programming Examination Practice

Timed practice exam simulation for CS401 - Computer Architecture and Assembly Language Programming.

๐Ÿ“˜ VU MID TERM EXAMLectures 1 to 22
โฑ๏ธ 60 Mins

Mid Term Examination

Covers syllabus of Lectures 1 to 22 with 30 high-yield MCQs in a timed exam environment.

๐Ÿ“30 MCQs
โฑ๏ธ60 Minutes
๐Ÿ“— VU FINAL TERM EXAMLectures 23 to 45
โฑ๏ธ 90 Mins

Final Term Examination

Comprehensive semester exam preparation with 45 MCQs covering Lectures 23 to 45 with complete course coverage.

๐Ÿ“45 MCQs
โฑ๏ธ90 Minutes
Showing 171 โ€“ 180 of 222 Questions
Page 18 of 23
Q171
๐Ÿ“ Short Q๐Ÿ“˜ CS401๐Ÿ“‘ Lec 5๐Ÿท๏ธ PUSH Instruction MechanicsEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
Describe the execution mechanism and function of the PUSH instruction in 8088 assembly language.
๐Ÿ’ป assembly Snippet
push ax
Q172
๐Ÿ“ Short Q๐Ÿ“˜ CS401๐Ÿ“‘ Lec 5๐Ÿท๏ธ Function Calling Conventions and Scratch RegistersEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
Which CPU registers are conventionally treated as caller-saved (scratch) registers during function calls in x86 architecture?
๐Ÿ’ป assembly Snippet
call my_func
Q173
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 5๐Ÿท๏ธ Far Subroutine Return (RETF) MechanicsEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
The RETF (Return Far) instruction pops the target segment address off the stack into which segment register?
๐Ÿ’ป assembly Snippet
retf
  1. A.CS (Code Segment) register
  2. B.DS (Data Segment) register
  3. C.SS (Stack Segment) register
  4. D.ES (Extra Segment) register
Q174
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 5๐Ÿท๏ธ Parameter Passing Calling Conventions (C vs Pascal)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
How many traditional parameter passing calling conventions (specifically C calling convention and Pascal calling convention) exist in standard x86 assembly language programming?
  1. A.1
  2. B.2
  3. C.3
  4. D.4
Q175
๐Ÿ“ Short Q๐Ÿ“˜ CS401๐Ÿ“‘ Lec 5๐Ÿท๏ธ Subroutine Return with Immediate Stack Cleanup (RET n)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
What is the exact execution result of the subroutine return instruction 'RET 2'?
๐Ÿ’ป assembly Snippet
ret 2
Q176
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 5๐Ÿท๏ธ Subroutine Calling Conventions (C vs Pascal)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
How many prevalent traditional calling conventions (specifically C calling convention and Pascal calling convention) exist in assembly language programming?
  1. A.1
  2. B.2
  3. C.3
  4. D.4
Q177
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 5๐Ÿท๏ธ Subroutine Calling Conventions (C vs Pascal)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
How many prevalent traditional calling conventions (specifically the C calling convention and the Pascal calling convention) exist in standard x86 assembly language programming?
  1. A.1
  2. B.2
  3. C.3
  4. D.4
Q178
๐Ÿ“ Short Q๐Ÿ“˜ CS401๐Ÿ“‘ Lec 5๐Ÿท๏ธ Calling Conventions Stack Cleanup (C vs Pascal)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
Who is responsible for removing parameters from the stack during subroutine calls in the C calling convention versus the Pascal calling convention?
๐Ÿ’ป assembly Snippet
; C Calling Convention (Caller cleans stack)
call my_func
add sp, 4

; Pascal Calling Convention (Callee cleans stack)
my_func:
  ; body
  ret 4
Q179
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 5๐Ÿท๏ธ Role of DX Register in 16-Bit Multiplication and DivisionEasyโญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
In 8088 16-bit arithmetic operations, register DX plays an essential role in holding the upper 16 bits during:
๐Ÿ’ป assembly Snippet
mul bx
div bx
  1. A.Multiplication and Division
  2. B.Addition and Subtraction
  3. C.Bit shifting and Rotating
  4. D.Logical AND/OR operations
Q180
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 5๐Ÿท๏ธ SHR (Shift Logical Right) Instruction ExecutionMediumโญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
If register BL contains binary 00000101 (5), what value will BL contain after executing a single Logical Shift Right ('SHR BL, 1') instruction?
๐Ÿ’ป assembly Snippet
mov bl, 00000101b
shr bl, 1
  1. A.00000010
  2. B.00000011
  3. C.00001010
  4. D.00000001