Ch 08: String Instructions and Primitives

307 Questions307 MCQs0 Short Questions0 Long Questions
๐ŸŽฏ Exam Practice Papers
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CS401 - Computer Architecture and Assembly Language Programming Examination Practice

Timed practice exam simulation for CS401 - Computer Architecture and Assembly Language Programming.

๐Ÿ“˜ VU MID TERM EXAMLectures 1 to 22
โฑ๏ธ 60 Mins

Mid Term Examination

Covers syllabus of Lectures 1 to 22 with 30 high-yield MCQs in a timed exam environment.

๐Ÿ“30 MCQs
โฑ๏ธ60 Minutes
๐Ÿ“— VU FINAL TERM EXAMLectures 23 to 45
โฑ๏ธ 90 Mins

Final Term Examination

Comprehensive semester exam preparation with 45 MCQs covering Lectures 23 to 45 with complete course coverage.

๐Ÿ“45 MCQs
โฑ๏ธ90 Minutes
Showing 51 โ€“ 60 of 307 Questions
Page 6 of 31
Q51
๐Ÿ“ Short Q๐Ÿ“˜ CS401๐Ÿ“‘ Lec 8๐Ÿท๏ธ 8.1. DOS Device Drivers (Device Driver Definition and Function)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
What are device drivers in operating system architecture? Provide a concise 2 to 3-line technical definition.
Q52
๐Ÿ“ Short Q๐Ÿ“˜ CS401๐Ÿ“‘ Lec 8๐Ÿท๏ธ 8.1. BIOS Disk Services (INT 0x13 Service 0x08 Get Drive Parameters Error Registers)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
When calling BIOS service `INT 0x13 / AH = 0x08` (Get Drive Parameters), which registers are used to return the error flag and error code if the operation fails?
๐Ÿ’ป assembly Snippet
mov ah, 0x08 ; Get Drive Parameters
mov dl, 0x80 ; First hard drive
int 0x13
jc error_handler ; If CF = 1, error code is in AH
Q53
๐Ÿ“ Short Q๐Ÿ“˜ CS401๐Ÿ“‘ Lec 8๐Ÿท๏ธ 8.1. BIOS Disk Services (INT 0x13 Service 0x03 Register Parameters)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
In BIOS disk interrupt service `INT 13h / AH = 03h` (Write Disk Sectors), match the parameters to their corresponding CPU registers from the given list: (Number of sectors to write, head number, 03h, data buffer, low eight bits of cylinder number) - AH = __________ - AL = __________ - CH = __________ - DH = __________ - ES:BX -> __________
๐Ÿ’ป assembly Snippet
mov ah, 0x03 ; Service 03h (Write Sectors)
mov al, 1    ; Number of sectors to write
mov ch, 0    ; Cylinder number (low 8 bits)
mov dh, 0    ; Head number
mov dl, 0x80 ; Drive 0x80
les bx, [buf]; ES:BX -> data buffer
Q54
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 8๐Ÿท๏ธ 8.1. Hardware Interrupts (IRET Interrupt Return Mechanics)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
Which x86 instruction is executed at the end of an Interrupt Service Routine (ISR) to restore execution state by popping `IP`, `CS`, and the `FLAGS` register from the stack?
๐Ÿ’ป assembly Snippet
custom_isr:
  ; ISR body
  iret ; Pops IP, CS, and FLAGS from stack
  1. A.Ret n
  2. B.REZA
  3. C.REPE
  4. D.IRET
Q55
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 8๐Ÿท๏ธ 8.1. Hardware Interrupts (INT 1 Trap / Single Step Interrupt)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
In x86 processor interrupt architecture, which interrupt vector is reserved for the Trap / Single Step interrupt?
  1. A.INT 0
  2. B.INT 1
  3. C.INT 3
  4. D.INT 4
Q56
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 8๐Ÿท๏ธ 8.1. Hardware Interrupts (INT 2 Non-Maskable Interrupt NMI)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
In x86 processor interrupt architecture, which interrupt vector is assigned to the Non-Maskable Interrupt (NMI)?
  1. A.INT 0
  2. B.INT 1
  3. C.INT 2
  4. D.INT 3
Q57
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 8๐Ÿท๏ธ 8.1. Interrupt Handling and Hooking (Interrupt Vector Table IVT Modification)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
To hook an interrupt in x86 assembly language, the programmer modifies the interrupt __________ corresponding to that interrupt in the Interrupt Vector Table (IVT).
๐Ÿ’ป assembly Snippet
; Vector entry for INT N = IVT address (N * 4)
  1. A.SX
  2. B.vector
  3. C.AX
  4. D.BX
Q58
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 8๐Ÿท๏ธ 8.1. Hardware Interrupts (IRQ 1 Keyboard Controller Interrupt)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
In IBM PC architecture, which hardware interrupt request line (IRQ) is assigned to the keyboard controller?
  1. A.IRQ 0
  2. B.IRQ 1
  3. C.IRQ 2
  4. D.IRQ 3
Q59
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 8๐Ÿท๏ธ 8.1. Hardware Interrupts (IRQ 6 Floppy Disk Controller Interrupt)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
In IBM PC architecture, which hardware interrupt request line (IRQ) is assigned to the Floppy Disk Drive controller?
  1. A.IRQ 4
  2. B.IRQ 5
  3. C.IRQ 6
  4. D.IRQ 7
Q60
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 8๐Ÿท๏ธ 8.1. Hardware Interrupts (INT 0 Division by Zero Exception)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
When a divide-by-zero error or quotient overflow occurs during execution of `DIV` or `IDIV`, how is the 'Divide by 0' exception (`INT 0`) triggered?
  1. A.INT 0
  2. B.INT 1
  3. C.INT 2
  4. D.This interrupt is generated automatically