Ch 01: Introduction to Assembly Language

387 Questions387 MCQs0 Short Questions0 Long Questions
๐ŸŽฏ Exam Practice Papers
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CS401 - Computer Architecture and Assembly Language Programming Examination Practice

Timed practice exam simulation for CS401 - Computer Architecture and Assembly Language Programming.

๐Ÿ“˜ VU MID TERM EXAMLectures 1 to 22
โฑ๏ธ 60 Mins

Mid Term Examination

Covers syllabus of Lectures 1 to 22 with 30 high-yield MCQs in a timed exam environment.

๐Ÿ“30 MCQs
โฑ๏ธ60 Minutes
๐Ÿ“— VU FINAL TERM EXAMLectures 23 to 45
โฑ๏ธ 90 Mins

Final Term Examination

Comprehensive semester exam preparation with 45 MCQs covering Lectures 23 to 45 with complete course coverage.

๐Ÿ“45 MCQs
โฑ๏ธ90 Minutes
Showing 41 โ€“ 50 of 387 Questions
Page 5 of 39
Q41
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 1๐Ÿท๏ธ 1.1. Introduction to Computer Architecture (Memory Cell Parallel Width)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
In computer memory organization, the first dimension specifies how many __________ bits are stored in a single memory cell.
  1. A.parallel
  2. B.Vertical
  3. C.long
  4. D.short
Q42
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 1๐Ÿท๏ธ 1.1. Introduction to Computer Architecture (Data Bus and Cell Width Matching)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
The __________ operation requires the data bus width to match the memory cell width exactly for single-cycle data transfers.
  1. A.Normal
  2. B.Best and simplest
  3. C.first
  4. D.None of the Given
Q43
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 1๐Ÿท๏ธ 1.1. Introduction to Computer Architecture (Control Bus Mechanism)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
In system architecture, the Control Bus serves as the primary mechanism for which function?
  1. A.Carrying memory addresses from CPU to memory
  2. B.Carrying bidirectional control and command signals between CPU and memory/peripherals
  3. C.Transferring arithmetic data values between registers
  4. D.Holding instruction opcodes inside the instruction pointer
Q44
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 1๐Ÿท๏ธ 1.1. Introduction to Computer Architecture (Control Bus Signals)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
The responsibility of sending appropriate read/write timing signals on the control bus to memory belongs to the __________.
  1. A.Data Bus
  2. B.processor
  3. C.Address Bus
  4. D.None of the Given
Q45
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 1๐Ÿท๏ธ 1.1. Introduction to Computer Architecture (Program Definition)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
True or False: A computer program is defined as an ordered set of instructions for the processor to execute.
  1. A.TRUE
  2. B.FALSE
Q46
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 1๐Ÿท๏ธ 1.1. Introduction to Computer Architecture (Address Bus Directionality)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
On the system address bus, physical memory address signals always travel from __________.
  1. A.Processor to memory
  2. B.Memory to processor
  3. C.Memory to memory
  4. D.None of the above
Q47
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 1๐Ÿท๏ธ 1.1. Introduction to Computer Architecture (Assembler Functionality)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
Regarding an assembler program, which of the following statements is true?
  1. A.Assembler converts mnemonics to the corresponding OPCODE
  2. B.Assembler converts OPCODE to the corresponding mnemonics
  3. C.Assembler executes the assembly code all at once
  4. D.Assembler executes the assembly code step by step
Q48
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 1๐Ÿท๏ธ 1.1. Introduction to Computer Architecture (Three System Buses)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
What are the three system buses used for communication between the processor (CPU) and main memory?
  1. A.address bus, data bus and data bus
  2. B.addressing bus, data bus and data bus
  3. C.address bus, datamove bus and data bus
  4. D.address bus, data bus and control bus
Q49
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 1๐Ÿท๏ธ 1.1. Introduction to Computer Architecture (Address Bus Directionality)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
True or False: The address bus is unidirectional, and physical memory addresses always travel from the processor to memory.
  1. A.TRUE
  2. B.FALSE
Q50
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 1๐Ÿท๏ธ 1.1. Introduction to Computer Architecture (Data Bus Bidirectionality)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
The system data bus is bidirectional because __________.
  1. A.It is a two-way signal line
  2. B.Data moves in both directions: from processor to memory (write) and from memory to processor (read)
  3. C.Data moves from both processor to memory and memory to data bus
  4. D.None of the given