Ch 01: Introduction to Assembly Language

387 Questions387 MCQs0 Short Questions0 Long Questions
🎯 Exam Practice Papers
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CS401 - Computer Architecture and Assembly Language Programming Examination Practice

Timed practice exam simulation for CS401 - Computer Architecture and Assembly Language Programming.

πŸ“˜ VU MID TERM EXAMLectures 1 to 22
⏱️ 60 Mins

Mid Term Examination

Covers syllabus of Lectures 1 to 22 with 30 high-yield MCQs in a timed exam environment.

πŸ“30 MCQs
⏱️60 Minutes
πŸ“— VU FINAL TERM EXAMLectures 23 to 45
⏱️ 90 Mins

Final Term Examination

Comprehensive semester exam preparation with 45 MCQs covering Lectures 23 to 45 with complete course coverage.

πŸ“45 MCQs
⏱️90 Minutes
Showing 381 – 387 of 387 Questions
Page 39 of 39
Q381
πŸ“ Short QπŸ“˜ CS401πŸ“‘ Lec 1🏷️ 1.2. Internal RegistersEasyβ­πŸ’‘πŸ“„πŸŽ“VUπŸ›οΈVU
What are the Source Index (SI) and Destination Index (DI) registers in 8086 assembly language, and how do they differ from general-purpose registers like AX or BX?
πŸ’» assembly Snippet
; Index register usage in assembly
mov si, source_buffer ; SI holds 16-bit memory offset
mov di, dest_buffer   ; DI holds 16-bit memory offset
; Note: Index registers cannot be accessed as 8-bit sub-registers in 8086
Q382
πŸ“ Short QπŸ“˜ CS401πŸ“‘ Lec 1🏷️ 1.2. Internal RegistersMediumβ­πŸ’‘πŸ“„πŸŽ“VUπŸ›οΈVU
Explain the roles and operational constraints of the Instruction Pointer (IP), Stack Pointer (SP), and Base Pointer (BP) registers in 8086 CPU architecture.
πŸ’» assembly Snippet
; Stack frame setup using BP and SP
push bp
mov bp, sp       ; Establish stack frame base pointer
mov ax, [bp + 4] ; Access stack parameter relative to SS:BP
Q383
πŸ“ Short QπŸ“˜ CS401πŸ“‘ Lec 1🏷️ 1.2. Internal RegistersMediumβ­πŸ’‘πŸ“„πŸŽ“VUπŸ›οΈVU
How is the 8086 Flag Register structured, and why is its value meaningful only on a bit-by-bit basis rather than as a unified numerical register?
πŸ’» assembly Snippet
; Inspecting Flag Register bits
pushf           ; Push 16-bit FLAGS register onto stack
pop ax          ; Pop flag bits into AX for individual bit analysis
Q384
πŸ“ Short QπŸ“˜ CS401πŸ“‘ Lec 1🏷️ 1.2. Internal RegistersEasyβ­πŸ’‘πŸ“„πŸŽ“VUπŸ›οΈVU
What are the 9 active flags in the 8086 Flag Register represented by the mnemonic 'ODITSZAPC', and what is the standard Intel operand order for assembly instructions?
πŸ’» assembly Snippet
; Intel Syntax: Operation Destination, Source
mov ax, bx    ; Copy contents of source (BX) into destination (AX)
add cx, 10    ; Add immediate value 10 (source) to CX (destination)
Q385
πŸ“ Short QπŸ“˜ CS401πŸ“‘ Lec 1🏷️ 1.1. Basic Computer ArchitectureEasyβ­πŸ’‘πŸ“„πŸŽ“VUπŸ›οΈVU
What is basic computer architecture, and what are the primary hardware components of a typical computer system?
πŸ’» assembly Snippet
; Conceptual System Bus Communication
; CPU <---> System Bus <---> Memory / I/O Subsystem
Q386
πŸ“ Short QπŸ“˜ CS401πŸ“‘ Lec 1🏷️ 1.1. Basic Computer ArchitectureEasyβ­πŸ’‘πŸ“„πŸŽ“VUπŸ›οΈVU
What is a computer program, and why is a sequence of binary instructions essential for the CPU to perform tasks?
πŸ’» assembly Snippet
; Machine Code vs Assembly Program Representation
; Machine Bytes: B8 05 00 (Opcode + Immediate Value)
mov ax, 5  ; Assembly instruction placing 5 into AX register
Q387
πŸ“ Short QπŸ“˜ CS401πŸ“‘ Lec 1🏷️ 1.1. Basic Computer ArchitectureEasyβ­πŸ’‘πŸ“„πŸŽ“VUπŸ›οΈVU
Explain the concept of programming using the 'ingredients and recipe' analogy, and describe how data and instructions interact during program execution.
πŸ’» assembly Snippet
; Data Ingredients and Program Recipe Structure
ingredient1 dw 15    ; Raw Data Ingredient
ingredient2 dw 25

; Recipe Instructions:
mov ax, [ingredient1]
add ax, [ingredient2]