Ch 01: Introduction to Assembly Language

387 Questions387 MCQs0 Short Questions0 Long Questions
๐ŸŽฏ Exam Practice Papers
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CS401 - Computer Architecture and Assembly Language Programming Examination Practice

Timed practice exam simulation for CS401 - Computer Architecture and Assembly Language Programming.

๐Ÿ“˜ VU MID TERM EXAMLectures 1 to 22
โฑ๏ธ 60 Mins

Mid Term Examination

Covers syllabus of Lectures 1 to 22 with 30 high-yield MCQs in a timed exam environment.

๐Ÿ“30 MCQs
โฑ๏ธ60 Minutes
๐Ÿ“— VU FINAL TERM EXAMLectures 23 to 45
โฑ๏ธ 90 Mins

Final Term Examination

Comprehensive semester exam preparation with 45 MCQs covering Lectures 23 to 45 with complete course coverage.

๐Ÿ“45 MCQs
โฑ๏ธ90 Minutes
Showing 291 โ€“ 300 of 387 Questions
Page 30 of 39
Q291
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 1๐Ÿท๏ธ 1.2. Internal RegistersEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
There is a central register in every processor called the ________, and the word size of a processor is defined by the width of its ________.
  1. A.Accumulator, Accumulator
  2. B.Data bus, Accumulator
  3. C.Accumulator, Address Bus
  4. D.Accumulator, Memory
Q292
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 1๐Ÿท๏ธ 1.3. Instruction GroupsEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
Which group of instructions allows changing specific processor behaviors and flag states (e.g., interrupt state, direction flag)?
๐Ÿ’ป assembly Snippet
cld
sti
  1. A.Special Instructions
  2. B.Data Movement Instructions
  3. C.Program Control Instructions
  4. D.Arithmetic and Logic Instructions
Q293
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 1๐Ÿท๏ธ 1.2. Internal RegistersEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
The iAPX88 (8088) architecture consists of how many total programmer-accessible 16-bit registers?
  1. A.13
  2. B.12
  3. C.9
  4. D.14
Q294
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 1๐Ÿท๏ธ 1.2. Internal RegistersEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
In the 8088 CPU architecture, the letter 'B' in register BX stands for ________ due to its primary role in memory addressing.
๐Ÿ’ป assembly Snippet
mov ax, [bx]  ; Base register addressing
  1. A.Busy
  2. B.Base
  3. C.Better
  4. D.None of the given options
Q295
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 1๐Ÿท๏ธ 1.2. Internal RegistersEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
In Intel iAPX88 architecture, which special-purpose register contains the memory offset address of the next instruction to be executed?
  1. A.AX
  2. B.PI
  3. C.IP
  4. D.SI
Q296
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 1๐Ÿท๏ธ 1.2. Internal RegistersEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
In 8088 CPU architecture, which register is bitwise significant, where each individual bit functions as an independent status or control flag?
  1. A.AX
  2. B.FS
  3. C.IP
  4. D.Flags Register
Q297
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 1๐Ÿท๏ธ 1.2. Internal RegistersEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
When two 16-bit numbers are added, the sum can be up to 17 bits long. Where is this extra 17th bit stored so it can be tested?
๐Ÿ’ป assembly Snippet
add ax, bx  ; Carry out of bit 15 enters CF
  1. A.Carry Flag (CF)
  2. B.Parity Flag (PF)
  3. C.Auxiliary Carry Flag (AF)
  4. D.Zero Flag (ZF)
Q298
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 1๐Ÿท๏ธ 1.1. Basic Computer ArchitectureEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
True or False: A computer program is defined as an ordered sequence of instructions for the processor.
  1. A.TRUE
  2. B.FALSE
Q299
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 1๐Ÿท๏ธ 1.3. Data MovementEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
True or False: In Intel x86 assembly language syntax, instructions follow the format 'operation destination, source'.
๐Ÿ’ป assembly Snippet
mov ax, bx  ; AX is destination, BX is source
  1. A.TRUE
  2. B.FALSE
Q300
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 1๐Ÿท๏ธ 1.5. Arithmetic & LogicEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
Consider the following assembly code segment: [org 0x0100] mov ax, [num1]; load first number in ax mov bx, [num2]; load second number in bx add ax, bx int 0x21 num1: dw 5 num2: dw 10 What is the correct inline comment for line 4 ('add ax, bx')?
๐Ÿ’ป assembly Snippet
add ax, bx
  1. A.No comment needed
  2. B.; accumulate sum in add
  3. C.; accumulate sum in ax
  4. D.; accumulate sum in bx