Ch 01: Introduction to Assembly Language

387 Questions387 MCQs0 Short Questions0 Long Questions
๐ŸŽฏ Exam Practice Papers
SEMESTER PASS

CS401 - Computer Architecture and Assembly Language Programming Examination Practice

Timed practice exam simulation for CS401 - Computer Architecture and Assembly Language Programming.

๐Ÿ“˜ VU MID TERM EXAMLectures 1 to 22
โฑ๏ธ 60 Mins

Mid Term Examination

Covers syllabus of Lectures 1 to 22 with 30 high-yield MCQs in a timed exam environment.

๐Ÿ“30 MCQs
โฑ๏ธ60 Minutes
๐Ÿ“— VU FINAL TERM EXAMLectures 23 to 45
โฑ๏ธ 90 Mins

Final Term Examination

Comprehensive semester exam preparation with 45 MCQs covering Lectures 23 to 45 with complete course coverage.

๐Ÿ“45 MCQs
โฑ๏ธ90 Minutes
Showing 271 โ€“ 280 of 387 Questions
Page 28 of 39
Q271
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 1๐Ÿท๏ธ 1.2. Internal RegistersEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
In 8088 CPU architecture, which register is bitwise significant, meaning each individual bit serves an independent status or control flag function?
  1. A.AX
  2. B.FS
  3. C.IP
  4. D.FLAGS Register
Q272
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 1๐Ÿท๏ธ 1.2. Internal RegistersEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
When two 16-bit numbers are added, the sum can be up to 17 bits long. In which CPU status flag is this extra carry bit stored so it can be tested?
๐Ÿ’ป assembly Snippet
add ax, bx  ; Carry out of bit 15 enters CF
  1. A.Carry Flag (CF)
  2. B.Parity Flag (PF)
  3. C.Auxiliary Carry Flag (AF)
  4. D.Zero Flag (ZF)
Q273
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 1๐Ÿท๏ธ 1.1. Basic Computer ArchitectureEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
True or False: A computer program is defined as an ordered sequence of instructions executed by the processor.
  1. A.TRUE
  2. B.FALSE
Q274
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 1๐Ÿท๏ธ 1.3. Data MovementEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
True or False: In Intel x86 assembly language syntax, instructions follow the format 'instruction destination, source'.
๐Ÿ’ป assembly Snippet
mov ax, bx  ; AX is destination, BX is source
  1. A.TRUE
  2. B.FALSE
Q275
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 1๐Ÿท๏ธ 1.5. Arithmetic & LogicEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
What operation is performed by the assembly instruction 'ADD AX, BX'?
๐Ÿ’ป assembly Snippet
add ax, bx
  1. A.Adds BX to AX and alters BX
  2. B.Adds AX to BX and alters AX
  3. C.Adds BX to AX and stores the result in AX
  4. D.Adds BX to AX and alters neither register
Q276
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 1๐Ÿท๏ธ 1.5. Arithmetic & LogicEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
Consider the following assembly code segment: [org 0x0100] mov ax, [num1]; load first number in ax mov bx, [num2]; load second number in bx add ax, bx What is the correct inline comment for line 4 ('add ax, bx')?
๐Ÿ’ป assembly Snippet
add ax, bx
  1. A.No comment needed
  2. B.; accumulate sum in add
  3. C.; accumulate sum in ax
  4. D.; accumulate sum in bx
Q277
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 1๐Ÿท๏ธ 1.5. Arithmetic & LogicEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
In 16-bit division using the 'DIV reg16' instruction, a 32-bit dividend held in register pair DX:AX is divided by a ________ operand, storing the quotient in AX and remainder in DX.
๐Ÿ’ป assembly Snippet
div bx  ; Divides 32-bit DX:AX by 16-bit BX
  1. A.16-bit operand
  2. B.17-bit operand
  3. C.32-bit operand
  4. D.64-bit operand
Q278
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 1๐Ÿท๏ธ 1.5. Arithmetic & LogicEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
In 8088 assembly language, division performed by the ________ instruction is strictly integer division, returning an integer quotient and remainder while discarding fractional values.
  1. A.DIV instruction
  2. B.ADC instruction
  3. C.SBB instruction
  4. D.DIVI instruction
Q279
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 1๐Ÿท๏ธ 1.5. Arithmetic & LogicEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
The ________ instruction performs unsigned binary multiplication of a source operand with the accumulator register.
๐Ÿ’ป assembly Snippet
mul bx  ; AX * BX -> DX:AX
  1. A.MULTI
  2. B.DIV
  3. C.MUL
  4. D.MOVE
Q280
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 1๐Ÿท๏ธ 1.1. Basic Computer ArchitectureEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
True or False: The address bus is unidirectional, and memory addresses always travel strictly from the processor to memory.
  1. A.TRUE
  2. B.FALSE