Ch 01: Introduction to Assembly Language

387 Questions387 MCQs0 Short Questions0 Long Questions
๐ŸŽฏ Exam Practice Papers
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CS401 - Computer Architecture and Assembly Language Programming Examination Practice

Timed practice exam simulation for CS401 - Computer Architecture and Assembly Language Programming.

๐Ÿ“˜ VU MID TERM EXAMLectures 1 to 22
โฑ๏ธ 60 Mins

Mid Term Examination

Covers syllabus of Lectures 1 to 22 with 30 high-yield MCQs in a timed exam environment.

๐Ÿ“30 MCQs
โฑ๏ธ60 Minutes
๐Ÿ“— VU FINAL TERM EXAMLectures 23 to 45
โฑ๏ธ 90 Mins

Final Term Examination

Comprehensive semester exam preparation with 45 MCQs covering Lectures 23 to 45 with complete course coverage.

๐Ÿ“45 MCQs
โฑ๏ธ90 Minutes
Showing 211 โ€“ 220 of 387 Questions
Page 22 of 39
Q211
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 1๐Ÿท๏ธ Unidirectional Address Bus DirectionalityEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
In computer system bus architecture, memory address signals on the address bus always travel in which direction?
  1. A.Processor to memory
  2. B.Memory to processor
  3. C.Memory to memory
  4. D.None of the given options
Q212
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 1๐Ÿท๏ธ 1.2. Internal RegistersEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
In 8088/x86 CPU architecture, register CX is primarily designated and used as a:
๐Ÿ’ป assembly Snippet
mov cx, 10
loop_start:
; body
loop loop_start
  1. A.Counter register
  2. B.Flag register
  3. C.Base register
  4. D.Destination register
Q213
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 1๐Ÿท๏ธ 1.5. Arithmetic & LogicEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
When the operand of a DIV instruction is 16 bits wide, where is the implicit 32-bit dividend stored?
๐Ÿ’ป assembly Snippet
div bx
  1. A.AX register
  2. B.The concatenation of DX and AX
  3. C.The concatenation of ES and AX
  4. D.The concatenation of DS and BX
Q214
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 1๐Ÿท๏ธ 1.1. Bus ArchitectureEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
In computer system bus architecture, the Data Bus operates in which directional mode?
  1. A.Uni-directional
  2. B.Bi-directional
  3. C.Non-directional
  4. D.None of the given options
Q215
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 1๐Ÿท๏ธ 1.1. Bus ArchitectureEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
Regarding assembler software development tools, which of the following statements is true?
  1. A.Assembler converts mnemonics to the corresponding OPCODE
  2. B.Assembler converts OPCODE to the corresponding mnemonics
  3. C.Assembler executes the assembly code all at once
  4. D.Assembler executes the assembly code step by step
Q216
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 1๐Ÿท๏ธ 1.3. Data MovementMedium๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
If '0xBB' is the OPCODE for moving a 16-bit immediate constant to the AX register, what is the complete hexadecimal byte encoding (using little-endian format) for the instruction 'MOV AX, 336' (where 336 decimal equals 0x0150)?
๐Ÿ’ป assembly Snippet
mov ax, 336  ; Opcode 0xBB, Immediate 0x0150 -> Byte sequence: BB 50 01
  1. A.0xBB0150
  2. B.0x5001BB
  3. C.0x01BB50
  4. D.0xBB5001
Q217
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 1๐Ÿท๏ธ 1.3. Data MovementEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
In the assembly instruction 'MOV AX, 5', how many operands are specified?
๐Ÿ’ป assembly Snippet
mov ax, 5
  1. A.1
  2. B.2
  3. C.3
  4. D.4
Q218
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 1๐Ÿท๏ธ 1.2. Internal RegistersEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
In x86 assembly language programming, the CX register is primarily used as a:
๐Ÿ’ป assembly Snippet
mov cx, 10
loop_label:
loop loop_label
  1. A.Source register
  2. B.Counter register
  3. C.Index register
  4. D.Pointer register
Q219
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 1๐Ÿท๏ธ 1.5. Arithmetic & LogicEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
When performing an 8-bit division ('DIV reg8'), where must the implicit 16-bit dividend be placed prior to executing the instruction?
๐Ÿ’ป assembly Snippet
mov ax, 100
mov bl, 5
div bl       ; AL = 20 (quotient), AH = 0 (remainder)
  1. A.AX
  2. B.BX
  3. C.CX
  4. D.DX
Q220
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 1๐Ÿท๏ธ 1.2. Internal RegistersEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
In 8088 CPU architecture, index registers (SI and DI) are primarily used to store:
  1. A.Memory offsets
  2. B.Segment base addresses
  3. C.Immediate constants
  4. D.Flag statuses