Ch 03: Branching, Loops and Program Flow

Examines program control flow in assembly, flag register evaluation (ZF, CF, SF, OF), relative displacement jumps, implementing loops, and bubble sort sorting algorithms in assembly.

261 Questions261 MCQs0 Short Questions0 Long Questions

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CS401 - Computer Architecture and Assembly Language Programming Examination Practice

Timed practice exam simulation for CS401 - Computer Architecture and Assembly Language Programming.

Showing 71 – 80 of 261 Questions

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Q71

📝 Short Q📘 CS401📑 Lec 3🏷️ 3.1. Basic Assembly Instructions (Implied Operand Definition)Easy🔁⭐💡📄🎓VU🏛️VU

Define an implied operand in assembly language.

💻 assembly Snippet

mul bx ; BX is explicit operand; AX is implied destination/source operand

Q72

❓ MCQ📘 CS401📑 Lec 3🏷️ 3.1. Basic Assembly Instructions (DIV 16-Bit Divisor 32-Bit Dividend)Easy🔁⭐💡📄🎓VU🏛️VU

When the divisor operand of the `DIV` instruction is 16 bits wide (`DIV reg16`), what is the bit width of the implied dividend stored in register pair `DX:AX`?

💻 assembly Snippet

div cx ; Divides 32-bit dividend in DX:AX by 16-bit CX

A.64-bit
B.32-bits
C.16-bits
D.8-bits

Q73

❓ MCQ📘 CS401📑 Lec 3🏷️ 3.1. Register Architecture (CX Count Register)Easy🔁⭐💡📄🎓VU🏛️VU

In x86 assembly language architecture, the `CX` register is primarily designated as the __________ register.

💻 assembly Snippet

mov cx, 100
rep movsb ; Uses CX as iteration count register

A.Count register
B.Data register
C.Index register
D.Base register

Q74

❓ MCQ📘 CS401📑 Lec 3🏷️ 3.1. Basic Assembly Instructions (DIV Instruction Operand Forms)Easy🔁⭐💡📄🎓VU🏛️VU

The unsigned integer division instruction `DIV` in 16-bit x86 assembly language has how many primary operational operand forms based on operand size?

💻 assembly Snippet

div bl ; Form 1: 8-bit division (AX / BL)
div bx ; Form 2: 16-bit division (DX:AX / BX)

A.One form
B.Two forms
C.Three forms
D.Four forms

Q75

❓ MCQ📘 CS401📑 Lec 3🏷️ 3.1. Basic Assembly Instructions (16-Bit DIV Implied Dividend)Easy🔁⭐💡📄🎓VU🏛️VU

When the operand of the `DIV` instruction is 16 bits wide (`DIV reg16`), what is the bit width of the implied dividend stored in register pair `DX:AX`?

💻 assembly Snippet

mov dx, 0
mov ax, 1000
mov cx, 10
div cx ; Dividend is 32-bit (DX:AX = 0x000003E8)

A.8 bits
B.16 bits
C.32 bits
D.64 bits

Q76

❓ MCQ📘 CS401📑 Lec 3🏷️ 3.1. Basic Assembly Instructions (Divide Overflow Exception)Easy🔁⭐💡📄🎓VU🏛️VU

When a very large dividend is divided by a very small divisor such that the calculated quotient exceeds the storage capacity of the destination register (e.g., quotient > 255 for 8-bit division), what processor exception occurs?

💻 assembly Snippet

mov ax, 1000
mov bl, 2
div bl ; Quotient 500 > 255 (max 8-bit AL) -> Triggers Divide Overflow Error (INT 0)

A.Divide logical error
B.Divide overflow error
C.Divide syntax error
D.An illegal instruction

Q77

❓ MCQ📘 CS401📑 Lec 3🏷️ 3.1. Basic Assembly Instructions (Labels and Memory Data Definitions)Easy🔁⭐💡📄🎓VU🏛️VU

In the assembly data definition statement `total: dw 0`, what structural role does the symbol `total` perform?

💻 assembly Snippet

total: dw 0 ; 'total' is a symbolic memory label

A.Literal
B.Variable
C.Label
D.Starting point

Q78

❓ MCQ📘 CS401📑 Lec 3🏷️ 3.1. Basic Assembly Instructions (ADC Explicit Operand Count)Easy🔁⭐💡📄🎓VU🏛️VU

How many explicit operands does the Add with Carry (`ADC`) instruction take in assembly language syntax?

💻 assembly Snippet

adc ax, bx ; 2 explicit operands (AX and BX)

A.two
B.three
C.Five
D.Zero

Q79

❓ MCQ📘 CS401📑 Lec 3🏷️ 3.1. Register Architecture (Fourteen Total 8088 Registers)Easy🔁⭐💡📄🎓VU🏛️VU

The Intel iAPX88 architecture consists of how many basic internal registers in total?

A.13
B.12
C.9
D.14

Q80

❓ MCQ📘 CS401📑 Lec 3🏷️ 3.1. Register Architecture (General Purpose Registers AX BX CX DX)Easy🔁⭐💡📄🎓VU🏛️VU

In 8088/8086 assembly language, the four General Purpose Registers are __________.

A.AX, BX, CX, and DX
B.XA, BX, CX, and DX
C.SS, SI and DI
D.3

Ch 03: Branching, Loops and Program Flow

CS401 - Computer Architecture and Assembly Language Programming Examination Practice

Mid Term Examination

Final Term Examination

CS401 - Computer Architecture and Assembly Language Programming Examination Practice

Mid Term Examination

Final Term Examination

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