Ch 04: Bit Manipulation and Shifts

198 Questions198 MCQs0 Short Questions0 Long Questions
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CS401 - Computer Architecture and Assembly Language Programming Examination Practice

Timed practice exam simulation for CS401 - Computer Architecture and Assembly Language Programming.

๐Ÿ“˜ VU MID TERM EXAMLectures 1 to 22
โฑ๏ธ 60 Mins

Mid Term Examination

Covers syllabus of Lectures 1 to 22 with 30 high-yield MCQs in a timed exam environment.

๐Ÿ“30 MCQs
โฑ๏ธ60 Minutes
๐Ÿ“— VU FINAL TERM EXAMLectures 23 to 45
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Final Term Examination

Comprehensive semester exam preparation with 45 MCQs covering Lectures 23 to 45 with complete course coverage.

๐Ÿ“45 MCQs
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Showing 41 โ€“ 50 of 198 Questions
Page 5 of 20
Q41
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 4๐Ÿท๏ธ 4.1. Addressing Modes (Illegal Register Subtraction in EA)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
True or False: In 16-bit x86 assembly language, subtracting an index register from a base register (e.g., `[bx - si]`) inside memory brackets is invalid/illegal syntax.
๐Ÿ’ป assembly Snippet
mov ax, [bx - si] ; ILLEGAL syntax
  1. A.True
  2. B.False
Q42
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 4๐Ÿท๏ธ 4.1. Segmented Memory Model (CS:IP Default Pairing)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
By default in x86 architecture, the Code Segment register (`CS`) is implicitly associated with which register to form full instruction addresses (`CS:IP`)?
  1. A.SS
  2. B.BP
  3. C.CX
  4. D.IP
Q43
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 4๐Ÿท๏ธ 4.1. Segmented Memory Model (1MB Physical Address Space)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
What is the maximum amount of physical RAM memory accessible by the 16-bit iAPX88 (8088/8086) processor?
  1. A.1MB
  2. B.2MB
  3. C.64KB
  4. D.4GB
Q44
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 4๐Ÿท๏ธ 4.1. Segmented Memory Model (20-bit Address Bus)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
The maximum physical memory capacity of 1 MB in the iAPX88 architecture is accessed using an address bus of what width?
  1. A.18 bits
  2. B.20 bits
  3. C.16 bits
  4. D.2 bits
Q45
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 4๐Ÿท๏ธ 4.1. Segmented Memory Model (Physical Address Definition)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
A 20-bit address such as `0x1DED0` that directly references a physical RAM location where an opcode (e.g. `B80500`) is stored is called a __________.
  1. A.physical memory address
  2. B.memory address
  3. C.effective address
  4. D.None of the Given
Q46
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 4๐Ÿท๏ธ 4.1. Segmented Memory Model (Address Wraparound)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
When adding segment base and offset addresses in real mode, if the calculated 20-bit address exceeds `0xFFFFF`, any generated 21st carry bit is dropped, wrapping the address back to `0x00000`. What is this phenomenon called?
  1. A.wraparound
  2. B.mode
  3. C.ping
  4. D.error
Q47
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 4๐Ÿท๏ธ 4.1. Segmented Memory Model (20-bit Address Computation)Medium๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
When converting 16-bit segment and offset addresses into a 20-bit physical address, the Segment Address has four zero bits added at its lower end, while the Offset Address has four zero bits extended at its __________ end.
  1. A.Middle
  2. B.lower
  3. C.Top
  4. D.upper
Q48
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 4๐Ÿท๏ธ 4.1. Segmented Memory Model (Paragraph Boundaries)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
In x86 memory segmentation, memory segment base addresses can only be defined on 16-byte aligned memory boundaries known as __________ boundaries.
  1. A.segment
  2. B.paragraph
  3. C.Cell
  4. D.RAM
Q49
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 4๐Ÿท๏ธ 4.1. Segmented Memory Model (COM File Segment Register Overlap)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
True or False: In a DOS `.COM` executable program, all four segment registers (`CS`, `DS`, `SS`, and `ES`) contain identical segment values.
  1. A.True
  2. B.False
Q50
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 4๐Ÿท๏ธ 4.1. Segmented Memory Model (Overlapping Segments)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
When multiple segment registers (e.g., CS, DS, SS, ES) contain identical segment values or point to overlapping physical memory regions, this phenomenon is called __________.
  1. A.equel memory
  2. B.overlapping segments
  3. C.segments hidding
  4. D.overlapping SIS