← CS401 - Computer Architecture and Assembly Language Programming OverviewChapter 4

Ch 04: Bit Manipulation and Shifts

198 Questions198 MCQs0 Short Questions0 Long Questions
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Showing 51 – 60 of 198 Questions
Page 6 of 20
Q51
❓ MCQ📘 CS401📑 Lec 4🏷️ 4.1. Addressing Modes (Register Addressing Mode)Easy🔁⭐💡📄🎓VU🏛️VU
Which addressing mode is used in the assembly instruction `mov ax, bx`?
💻 assembly Snippet
mov ax, bx ; Register addressing mode
  1. A.Immediate
  2. B.Indirect
  3. C.Direct
  4. D.Register
Q52
❓ MCQ📘 CS401📑 Lec 4🏷️ 4.1. Addressing Modes (Based Register Indirect Addressing)Easy🔁⭐💡📄🎓VU🏛️VU
Which addressing mode is used in the assembly instruction `mov ax, [bx]`?
💻 assembly Snippet
mov ax, [bx] ; Based Register Indirect addressing mode
  1. A.Based Register Indirect
  2. B.Indirect
  3. C.Base Indirect
  4. D.Immediate
Q53
❓ MCQ📘 CS401📑 Lec 4🏷️ 4.1. Addressing Modes (Immediate Addressing Mode)Easy🔁⭐💡📄🎓VU🏛️VU
Which addressing mode is used in the assembly instruction `mov ax, 5`?
💻 assembly Snippet
mov ax, 5 ; Immediate addressing mode
  1. A.Immediate
  2. B.Indirect
  3. C.Direct
  4. D.Register
Q54
❓ MCQ📘 CS401📑 Lec 4🏷️ 4.1. Addressing Modes (Based Register Plus Offset Addressing)Easy🔁⭐💡📄🎓VU🏛️VU
Which addressing mode is used in the assembly instruction `mov ax, [num1+bx]`?
💻 assembly Snippet
mov ax, [num1+bx] ; Based Register + Offset addressing mode
  1. A.OFFSET+ Indirect
  2. B.Register + Direct
  3. C.Indirect + Reference
  4. D.BASEd REGISTER + OFFSET
Q55
❓ MCQ📘 CS401📑 Lec 4🏷️ 4.1. Addressing Modes (Effective Address Definition)Easy🔁⭐💡📄🎓VU🏛️VU
In 'base + offset addressing', adding the base register content to the offset displacement yields a 16-bit offset value called the __________.
💻 assembly Snippet
mov ax, [bx + 0x0100] ; EA = BX + 0x0100
  1. A.Address
  2. B.mode
  3. C.effective address
  4. D.Physical Address
Q56
❓ MCQ📘 CS401📑 Lec 4🏷️ 4.1. Segmented Memory Model (Segment Override Prefix CS)Easy🔁⭐💡📄🎓VU🏛️VU
In the assembly instruction `mov ax, [cs:bx]`, the segment override prefix `cs:` explicitly associates which segment register with base register `BX`?
💻 assembly Snippet
mov ax, [cs:bx] ; Overrides default DS to pair BX with CS (CS:BX)
  1. A.CS with BX
  2. B.BX with CS
  3. C.BX with AX
  4. D.None of the Given
Q57
❓ MCQ📘 CS401📑 Lec 4🏷️ 4.1. Addressing Modes (Effective Address Calculation)Easy🔁⭐💡📄🎓VU🏛️VU
Given `BX = 0x0100`, `DS = 0xFFF0`, and the instruction `mov [bx+0x0100], ax`, what is the calculated Effective Address (EA)?
💻 assembly Snippet
mov [bx + 0x0100], ax ; EA = 0x0100 + 0x0100 = 0x0200
  1. A.0020
  2. B.0200
  3. C.0300
  4. D.0x02
Q58
❓ MCQ📘 CS401📑 Lec 4🏷️ 4.1. Segmented Memory Model (Physical Address Calculation with Wraparound)Medium🔁⭐💡📄🎓VU🏛️VU
Given `BX = 0x0100`, `DS = 0xFFF0`, and the instruction `mov [bx+0x0100], ax`, what is the resulting 20-bit Physical Memory Address after 1 MB wraparound?
💻 assembly Snippet
; Segment Base = 0xFFF0 * 0x10 = 0xFFF00
; EA = 0x0100 + 0x0100 = 0x0200
; Physical Address = 0xFFF00 + 0x0200 = 0x100100 -> 0x0100 (20-bit wraparound)
  1. A.0020
  2. B.0x0100
  3. C.0x10100
  4. D.0x100100
Q59
❓ MCQ📘 CS401📑 Lec 4🏷️ 4.1. Addressing Modes (Direct Addressing Mode)Easy🔁⭐💡📄🎓VU🏛️VU
Which addressing mode is used in the assembly instruction `mov [1234], al`?
💻 assembly Snippet
mov [1234], al ; Direct addressing mode
  1. A.Immediate
  2. B.Indirect
  3. C.Direct
  4. D.Register
Q60
❓ MCQ📘 CS401📑 Lec 4🏷️ 4.1. Addressing Modes (Indexed Register Indirect Addressing)Easy🔁⭐💡📄🎓VU🏛️VU
Which addressing mode is used in the assembly instruction `mov [SI], AX`?
💻 assembly Snippet
mov [si], ax ; Indexed Register Indirect addressing mode
  1. A.Based Register Indirect
  2. B.Indirect
  3. C.Indexed Register Indirect
  4. D.Immediate

📖 Related CS401 - Computer Architecture and Assembly Language Programming Curriculum Units

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View All CS401 - Computer Architecture and Assembly Language Programming Chapters →
Ch 01: Introduction to Assembly Language387 QsCh 02: 16-Bit Segmented Memory Model & Addressing Modes395 QsCh 03: Branching, Loops and Program Flow261 QsCh 05: Subroutines and Stack Architecture222 QsCh 06: Parameter Passing and Stack Frames216 QsCh 07: Video Memory & Screen Display264 Qs