Ch 01: Introduction to Assembly Language

387 Questions387 MCQs0 Short Questions0 Long Questions
๐ŸŽฏ Exam Practice Papers
SEMESTER PASS

CS401 - Computer Architecture and Assembly Language Programming Examination Practice

Timed practice exam simulation for CS401 - Computer Architecture and Assembly Language Programming.

๐Ÿ“˜ VU MID TERM EXAMLectures 1 to 22
โฑ๏ธ 60 Mins

Mid Term Examination

Covers syllabus of Lectures 1 to 22 with 30 high-yield MCQs in a timed exam environment.

๐Ÿ“30 MCQs
โฑ๏ธ60 Minutes
๐Ÿ“— VU FINAL TERM EXAMLectures 23 to 45
โฑ๏ธ 90 Mins

Final Term Examination

Comprehensive semester exam preparation with 45 MCQs covering Lectures 23 to 45 with complete course coverage.

๐Ÿ“45 MCQs
โฑ๏ธ90 Minutes
Showing 361 โ€“ 370 of 387 Questions
Page 37 of 39
Q361
๐Ÿ“ Short Q๐Ÿ“˜ CS401๐Ÿ“‘ Lec 1๐Ÿท๏ธ 1.2. Internal RegistersEasyโญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
Explain the operations and setting conditions for the Zero Flag (ZF) and Sign Flag (SF) in 8086 processor architecture.
๐Ÿ’ป assembly Snippet
; ZF and SF Example
mov ax, 5
sub ax, 5     ; AX = 0 -> ZF = 1, SF = 0
mov ax, 3
sub ax, 5     ; AX = -2 (0xFFFE) -> ZF = 0, SF = 1
Q362
๐Ÿ“ Short Q๐Ÿ“˜ CS401๐Ÿ“‘ Lec 1๐Ÿท๏ธ 1.2. Internal RegistersMediumโญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
Describe the control functions of the Trap Flag (TF) and Interrupt Flag (IF) in 8086 CPU execution and debugging.
๐Ÿ’ป assembly Snippet
; Enabling and Disabling Hardware Interrupts in Assembly
cli    ; Clear Interrupt Flag (IF = 0, disable interrupts)
; ... critical section ...
sti    ; Set Interrupt Flag (IF = 1, enable interrupts)
Q363
๐Ÿ“ Short Q๐Ÿ“˜ CS401๐Ÿ“‘ Lec 1๐Ÿท๏ธ 1.2. Internal RegistersMediumโญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
What is the Overflow Flag (OF) in 8086 assembly language, and under what conditions is it set or cleared during arithmetic operations?
๐Ÿ’ป assembly Snippet
; Signed Arithmetic Overflow Example
mov al, +127   ; Max positive 8-bit signed integer (0x7F)
add al, 1      ; AL becomes 128 (0x80 = -128 in 2's complement); OF = 1
Q364
๐Ÿ“ Short Q๐Ÿ“˜ CS401๐Ÿ“‘ Lec 1๐Ÿท๏ธ 1.2. Internal RegistersMediumโญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
How can malicious software hijack program execution flow by manipulating the Instruction Pointer (IP) register?
๐Ÿ’ป assembly Snippet
; Theoretical IP Redirection
; Normal CS:IP points to valid instruction stream
; Hijacked CS:IP points to malicious code segment offset
Q365
๐Ÿ“ Short Q๐Ÿ“˜ CS401๐Ÿ“‘ Lec 1๐Ÿท๏ธ 1.3. Data MovementEasyโญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
Explain the syntax and operation of data movement instructions in x86 assembly language, comparing 'MOV AX, BX' and 'MOV AX, 19' with high-level load instructions like 'LDA'.
๐Ÿ’ป assembly Snippet
; Data Movement Examples in 8086 Assembly
mov ax, bx    ; Copy contents of BX into AX
mov ax, 19    ; Load immediate value 19 into AX
mov ax, 89    ; Load immediate value 89 into AX (equivalent to LDA 89)
Q366
๐Ÿ“ Short Q๐Ÿ“˜ CS401๐Ÿ“‘ Lec 1๐Ÿท๏ธ 1.2. Internal RegistersEasyโญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
Describe the four 16-bit general-purpose data registers (AX, BX, CX, DX) in the 8086 microprocessor, including their sub-register divisions and primary functional uses.
๐Ÿ’ป assembly Snippet
; 8086 Data Registers Usage Example
add ax, ax      ; AX = AX + AX
mov bl, [0x0500]; Load byte from memory offset into BL
mov cx, 0x0005  ; Set loop counter
mul bx          ; DX:AX = AX * BX
Q367
๐Ÿ“ Short Q๐Ÿ“˜ CS401๐Ÿ“‘ Lec 1๐Ÿท๏ธ 1.2. RegistersEasyโญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
What is the Destination Index (DI) register in 8086 assembly language, and what is its default segment association during string operations?
๐Ÿ’ป assembly Snippet
; Example string destination indexing using ES:DI
mov ax, 0xB800
mov es, ax      ; Point ES to video display memory
xor di, di      ; DI = 0 (top-left screen position ES:DI)
mov ax, 0x0720  ; Blank space character with normal attribute
stosw           ; Store word into [ES:DI]
Q368
๐Ÿ“ Short Q๐Ÿ“˜ CS401๐Ÿ“‘ Lec 1๐Ÿท๏ธ 1.1. Basic Computer ArchitectureEasyโญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
What are the three fundamental hardware components of a computer system, and what basic mechanisms must exist for a processor to read data from memory?
Q369
๐Ÿ“ Short Q๐Ÿ“˜ CS401๐Ÿ“‘ Lec 1๐Ÿท๏ธ 1.1. Basic Computer ArchitectureMediumโญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
Describe the functions of the Address Bus, Data Bus, and Control Bus in processor-memory communication.
Q370
๐Ÿ“ Short Q๐Ÿ“˜ CS401๐Ÿ“‘ Lec 1๐Ÿท๏ธ 1.1. Basic Computer ArchitectureMediumโญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
Why is the Address Bus unidirectional while the Data Bus and Control Bus are bidirectional, and what is meant by memory 'cell width'?