Ch 10: Hardware Interrupts and PIC 8259

Examines hardware interrupt architecture, masking interrupts via IMR (port 0x21), cascading master and slave PICs, sending non-specific EOI (0x20) commands, and servicing asynchronous peripheral requests.

189 Questions189 MCQs0 Short Questions0 Long Questions

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CS401 - Computer Architecture and Assembly Language Programming Examination Practice

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Showing 41 – 50 of 189 Questions

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Q41

📝 Short Q📘 CS401📑 Lec 10🏷️ 10.1. Hardware Interfacing and I/O (INT 14h Serial Read Character Register Roles)Easy🔁⭐💡📄🎓VU🏛️VU

When executing BIOS serial port service `INT 14h` with service function code `AH = 0x02` (Read Character from Serial Port), what do registers `AH`, `AL`, and `DX` represent?

💻 assembly Snippet

mov ah, 0x02 ; Read character service
mov dx, 0    ; COM1 port
int 0x14     ; Returns character in AL and status in AH

Q42

❓ MCQ📘 CS401📑 Lec 10🏷️ 10.1. Hardware Interfacing and I/O (UART Line Status Register Bit Flags)Easy🔁⭐💡📄🎓VU🏛️VU

In serial port UART communication, every individual bit in the Line Status Register (LSR) conveys __________ information regarding transmission and reception states.

A.different
B.same
C.partial
D.full

Q43

📝 Short Q📘 CS401📑 Lec 10🏷️ 10.1. Hardware Interfacing and I/O (Serial Port I/O Addresses and Dual-Register Mapping)Easy🔁⭐💡📄🎓VU🏛️VU

In x86 serial port interfacing, what are the standard I/O port address ranges for COM1 and COM2, and what dual registers map to the base offset `+0` (e.g., port `0x3F8` for COM1)?

💻 assembly Snippet

mov dx, 0x3F8 ; Base COM1 port
mov al, 'A'
out dx, al    ; Writes to Transmitter Holding Register
in  al, dx    ; Reads from Receiver Buffer Register

Q44

📝 Short Q📘 CS401📑 Lec 10🏷️ 10.1. Hardware Interfacing and I/O (UART Interrupt Enable Register 0x3F9)Easy🔁⭐💡📄🎓VU🏛️VU

In UART serial port communication (e.g., COM1 port offset 0x3F9), which register controls interrupt generation, and which specific bits enable Received Data Available interrupt and Transmitter Holding Register Empty interrupt?

💻 assembly Snippet

mov dx, 0x3F9 ; COM1 Interrupt Enable Register (IER)
mov al, 0x03  ; Enable both Received Data (Bit 0) & Transmitter Empty (Bit 1) interrupts
out dx, al

Q45

❓ MCQ📘 CS401📑 Lec 10🏷️ 10.1. Peripheral Interfacing and I/O Instructions (OUT Instruction Source Register AL/AX)Easy🔁⭐💡📄🎓VU🏛️VU

When transferring data to external I/O hardware ports using the `OUT` assembly instruction, which register serves as the required data source operand?

💻 assembly Snippet

mov dx, 0x03C8
mov al, 0xFF
out dx, al ; Output byte in AL to port in DX

A.AL or AX
B.BL or BX
C.CL or CX
D.DL or DX

Q46

❓ MCQ📘 CS401📑 Lec 10🏷️ 10.1. Hardware Interfacing (Parallel Port DB-25 Ground Pin Assignments)Easy🔁⭐💡📄🎓VU🏛️VU

On a standard IBM PC parallel printer port (DB-25 connector), which pin numbers are tied to ground?

A.10-18
B.18-25
C.25-32
D.32-39

Q47

❓ MCQ📘 CS401📑 Lec 10🏷️ 10.1. Hardware Interfacing (Serial Port DB-9 Pin Assignments)Easy🔁⭐💡📄🎓VU🏛️VU

In a standard 9-pin DB-9 RS-232 serial port connector, which pin number is assigned to TD (Transmit Data)?

Q48

❓ MCQ📘 CS401📑 Lec 10🏷️ 10.1. Hardware Interfacing (Serial Port DB-9 Connector Standard)Easy🔁⭐💡📄🎓VU🏛️VU

The standard RS-232 serial port connection on an IBM PC uses which connector type?

A.9pin DB 9
B.8pin DB 9
C.3pin DB 9
D.9pin DB 5

Q49

❓ MCQ📘 CS401📑 Lec 10🏷️ 10.1. Hardware Interfacing (Serial Port DB-9 Pin Assignments CTS)Easy🔁⭐💡📄🎓VU🏛️VU

In a standard 9-pin DB-9 RS-232 serial connector, which pin number is assigned to CTS (Clear To Send)?

Q50

❓ MCQ📘 CS401📑 Lec 10🏷️ 10.1. Hardware Interfacing (Serial Port DB-9 Pin Assignments RTS)Easy🔁⭐💡📄🎓VU🏛️VU

In a standard 9-pin DB-9 RS-232 serial port connector, which pin number is assigned to RTS (Request To Send)?

Ch 10: Hardware Interrupts and PIC 8259

CS401 - Computer Architecture and Assembly Language Programming Examination Practice

Mid Term Examination

Final Term Examination

CS401 - Computer Architecture and Assembly Language Programming Examination Practice

Mid Term Examination

Final Term Examination

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