Ch 03: Branching, Loops and Program Flow

261 Questions261 MCQs0 Short Questions0 Long Questions
๐ŸŽฏ Exam Practice Papers
SEMESTER PASS

CS401 - Computer Architecture and Assembly Language Programming Examination Practice

Timed practice exam simulation for CS401 - Computer Architecture and Assembly Language Programming.

๐Ÿ“˜ VU MID TERM EXAMLectures 1 to 22
โฑ๏ธ 60 Mins

Mid Term Examination

Covers syllabus of Lectures 1 to 22 with 30 high-yield MCQs in a timed exam environment.

๐Ÿ“30 MCQs
โฑ๏ธ60 Minutes
๐Ÿ“— VU FINAL TERM EXAMLectures 23 to 45
โฑ๏ธ 90 Mins

Final Term Examination

Comprehensive semester exam preparation with 45 MCQs covering Lectures 23 to 45 with complete course coverage.

๐Ÿ“45 MCQs
โฑ๏ธ90 Minutes
Showing 151 โ€“ 160 of 261 Questions
Page 16 of 27
Q151
๐Ÿง  Long Problem๐Ÿ“˜ CS401๐Ÿ“‘ Lec 3๐Ÿท๏ธ Bitwise Shift Left and Mathematical MultiplicationMedium๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
Explain the working mechanism, mathematical effect, bit movement, and flag updates of the SHL (Shift Logical Left) instruction in 8088 assembly language.
๐Ÿ’ป assembly Snippet
shl ax, 1
mov cl, 3
shl bx, cl
Q152
๐Ÿง  Long Problem๐Ÿ“˜ CS401๐Ÿ“‘ Lec 3๐Ÿท๏ธ Looping Mechanics and Summation AlgorithmsMediumโญ๐Ÿ’ก๐ŸŒŸ๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
Analyze the following 8088 assembly language code sequence and determine what value will be stored in the memory variable 'Find' after execution: ```assembly [org 0x0100] mov cx, [num1] mov ax, 0 l1: add ax, cx sub cx, 1 jnz l1 mov [Find], ax ```
๐Ÿ’ป assembly Snippet
[org 0x0100]
mov cx, [num1]
mov ax, 0
l1:
add ax, cx
sub cx, 1
jnz l1
mov [Find], ax
Q153
๐Ÿง  Long Problem๐Ÿ“˜ CS401๐Ÿ“‘ Lec 3๐Ÿท๏ธ Register Arithmetic and Memory PreservationMedium๐Ÿ”โญ๐Ÿ’ก๐ŸŒŸ๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
Analyze the following 8088 assembly language code sequence and determine the values stored in memory variables 'num1' and 'num2', as well as the final contents of registers AX and BX after execution: ```assembly [org 0x0100] mov ax, [num1] mov bx, [num2] add ax, bx sub bx, ax add ax, bx mov ax, 0x4c00 int 0x21 num1: dw 5 num2: dw 10 ```
๐Ÿ’ป assembly Snippet
[org 0x0100]
mov ax, [num1]
mov bx, [num2]
add ax, bx
sub bx, ax
add ax, bx
mov ax, 0x4c00
int 0x21
num1: dw 5
num2: dw 10
Q154
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 3๐Ÿท๏ธ Bitwise Rotation Instructions and Carry Flag OperationsMedium๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
Which bitwise bit-rotation instruction rotates the destination operand bits to the right through the Carry Flag (CF)?
๐Ÿ’ป assembly Snippet
clc
rcr ax, 1
  1. A.ROR (Rotate Right)
  2. B.RCR (Rotate Through Carry Right)
  3. C.SHR (Shift Logical Right)
  4. D.SAR (Shift Arithmetic Right)
Q155
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 3๐Ÿท๏ธ Unsigned Division and Register PairingEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
When a 32-bit dividend is divided by a 16-bit divisor in 8088 assembly language (using the DIV instruction), what is the bit width of the quotient stored in the AX register?
๐Ÿ’ป assembly Snippet
mov dx, 0x0001
mov ax, 0x86A0
mov cx, 1000
div cx
  1. A.32 bits
  2. B.16 bits
  3. C.8 bits
  4. D.4 bits
Q156
๐Ÿ“ Short Q๐Ÿ“˜ CS401๐Ÿ“‘ Lec 3๐Ÿท๏ธ Division Instruction Faults and INT 0Medium๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
Explain what causes a Divide Overflow exception in 8088 assembly language and state which interrupt vector is automatically triggered.
๐Ÿ’ป assembly Snippet
mov dx, 0xFFFF
mov ax, 0xFFFF
mov cx, 1
div cx
Q157
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 3๐Ÿท๏ธ Unsigned Division and Implied Register UsageEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
When executing the 8-bit division instruction 'DIV BL', where is the implied 16-bit dividend stored?
๐Ÿ’ป assembly Snippet
mov ax, 100
mov bl, 10
div bl
  1. A.AX
  2. B.BX
  3. C.CX
  4. D.DX
Q158
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 3๐Ÿท๏ธ Hardware Exceptions and Divide Error INT 0Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
When a division by zero error occurs during the execution of a DIV or IDIV instruction, how is the 'Divide by Zero' interrupt handled by the CPU?
๐Ÿ’ป assembly Snippet
mov ax, 10
mov bl, 0
div bl
  1. A.INT 0 instruction must be written in code
  2. B.INT 1 instruction must be written in code
  3. C.INT 2 instruction must be written in code
  4. D.This interrupt is generated automatically by hardware
Q159
๐Ÿ“ Short Q๐Ÿ“˜ CS401๐Ÿ“‘ Lec 3๐Ÿท๏ธ Conditional vs Unconditional Jump InstructionsEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
Differentiate between Conditional Jump and Unconditional Jump instructions in 8088 assembly language.
๐Ÿ’ป assembly Snippet
jmp target
jz label1
Q160
๐Ÿ“ Short Q๐Ÿ“˜ CS401๐Ÿ“‘ Lec 3๐Ÿท๏ธ Position-Relative Addressing and Jump EncodingMedium๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
Explain Position-Relative Addressing in jump instructions and describe how target addresses are calculated using the Instruction Pointer (IP).
๐Ÿ’ป assembly Snippet
jmp short label1