Ch 07: Video Memory & Screen Display

264 Questions264 MCQs0 Short Questions0 Long Questions
๐ŸŽฏ Exam Practice Papers
SEMESTER PASS

CS401 - Computer Architecture and Assembly Language Programming Examination Practice

Timed practice exam simulation for CS401 - Computer Architecture and Assembly Language Programming.

๐Ÿ“˜ VU MID TERM EXAMLectures 1 to 22
โฑ๏ธ 60 Mins

Mid Term Examination

Covers syllabus of Lectures 1 to 22 with 30 high-yield MCQs in a timed exam environment.

๐Ÿ“30 MCQs
โฑ๏ธ60 Minutes
๐Ÿ“— VU FINAL TERM EXAMLectures 23 to 45
โฑ๏ธ 90 Mins

Final Term Examination

Comprehensive semester exam preparation with 45 MCQs covering Lectures 23 to 45 with complete course coverage.

๐Ÿ“45 MCQs
โฑ๏ธ90 Minutes
Showing 221 โ€“ 230 of 264 Questions
Page 23 of 27
Q221
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 7๐Ÿท๏ธ String Instruction Index Register Pairs (SI and DI)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
Which pair of index registers is used together to access source and destination memory in string instructions (such as MOVSB)?
๐Ÿ’ป assembly Snippet
movsb
  1. A.DI and BP
  2. B.SI and BP
  3. C.SI and DI
  4. D.DS and SI
Q222
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 7๐Ÿท๏ธ String Repetition Prefix (REP) and CX DecrementEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
When executing a string instruction with the REP repetition prefix (such as REP STOSW), how is the loop counter register CX modified after each iteration?
๐Ÿ’ป assembly Snippet
rep stosw
  1. A.Incremented by 1
  2. B.Incremented by 2
  3. C.Decremented by 1
  4. D.Decremented by 2
Q223
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 7๐Ÿท๏ธ STOSW Instruction and Index Register IncrementEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
When executing the STOSW (Store String Word) instruction with the Direction Flag cleared (DF = 0), how is the Destination Index (DI) register modified?
๐Ÿ’ป assembly Snippet
cld
stosw
  1. A.Incremented by 1
  2. B.Incremented by 2
  3. C.Decremented by 1
  4. D.Decremented by 2
Q224
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 7๐Ÿท๏ธ CLD Instruction and Direction FlagEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
Which x86 instruction is used to clear the Direction Flag (DF = 0) for auto-incrementing string operations?
๐Ÿ’ป assembly Snippet
cld
  1. A.CLD (Clear Direction Flag)
  2. B.CLRD
  3. C.CL DF
  4. D.CLR DF
Q225
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 7๐Ÿท๏ธ STOSB Instruction and Index Register Auto-IncrementEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
In string instructions like STOSB (Store String Byte), when the Direction Flag (DF) is cleared (DF = 0), how is the Destination Index (DI) register modified after storing a byte?
๐Ÿ’ป assembly Snippet
cld
stosb
  1. A.Incremented by 1
  2. B.Incremented by 2
  3. C.Decremented by 1
  4. D.Decremented by 2
Q226
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 7๐Ÿท๏ธ REP Prefix and String Loop Counter (CX)Medium๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
When using the repeat prefix REP with STOSW (REP STOSW), after each word store iteration, register CX is:
๐Ÿ’ป assembly Snippet
rep stosw
  1. A.Decremented by 1
  2. B.Decremented by 2
  3. C.Incremented by 1
  4. D.Incremented by 2
Q227
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 7๐Ÿท๏ธ STOSB Instruction and Index Pointer AdjustmentEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
In the STOSB (Store String Byte) instruction, by how many bytes is index register DI incremented or decremented after storing a byte?
๐Ÿ’ป assembly Snippet
cld
stosb
  1. A.3 bytes
  2. B.2 bytes
  3. C.1 byte
  4. D.4 bytes
Q228
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 7๐Ÿท๏ธ Base Register Indirect Addressing ModeEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
Which memory addressing mode is utilized in the 8088 assembly instruction 'MOV [BX], AX'?
๐Ÿ’ป assembly Snippet
mov [bx], ax
  1. A.Base register indirect addressing
  2. B.Direct memory addressing
  3. C.Immediate addressing
  4. D.Base-plus-index addressing
Q229
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 7๐Ÿท๏ธ Instruction Pointer (IP) Offset TrackingEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
In 8088 processor architecture, the Instruction Pointer (IP) register contains the memory offset of:
  1. A.The next instruction to be executed
  2. B.The currently executing instruction
  3. C.The top of the stack frame
  4. D.The active interrupt vector
Q230
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 7๐Ÿท๏ธ 7.1. String Primitive InstructionsEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
In the STOSB (Store String Byte) instruction, the destination index register (DI) is automatically incremented or decremented by how many bytes after each store operation?
๐Ÿ’ป assembly Snippet
stosb
  1. A.1
  2. B.2
  3. C.3
  4. D.4