Ch 17: Secondary Storage and Device Drivers

183 Questions183 MCQs0 Short Questions0 Long Questions
๐ŸŽฏ Exam Practice Papers
SEMESTER PASS

CS401 - Computer Architecture and Assembly Language Programming Examination Practice

Timed practice exam simulation for CS401 - Computer Architecture and Assembly Language Programming.

๐Ÿ“˜ VU MID TERM EXAMLectures 1 to 22
โฑ๏ธ 60 Mins

Mid Term Examination

Covers syllabus of Lectures 1 to 22 with 30 high-yield MCQs in a timed exam environment.

๐Ÿ“30 MCQs
โฑ๏ธ60 Minutes
๐Ÿ“— VU FINAL TERM EXAMLectures 23 to 45
โฑ๏ธ 90 Mins

Final Term Examination

Comprehensive semester exam preparation with 45 MCQs covering Lectures 23 to 45 with complete course coverage.

๐Ÿ“45 MCQs
โฑ๏ธ90 Minutes
Showing 31 โ€“ 40 of 183 Questions
Page 4 of 19
Q31
๐Ÿ“ Short Q๐Ÿ“˜ CS401๐Ÿ“‘ Lec 17๐Ÿท๏ธ Space-Efficient Register Zeroing (XOR reg, reg)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
Why is 'XOR DI, DI' preferred over 'MOV DI, 0' for clearing a 16-bit register in 8088 assembly language?
๐Ÿ’ป assembly Snippet
xor di, di
Q32
๐Ÿ“ Short Q๐Ÿ“˜ CS401๐Ÿ“‘ Lec 17๐Ÿท๏ธ Combining LODS and STOS for Video Memory Block ProcessingMedium๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
Explain how the LODS and STOS instructions are combined in a processing loop to print string characters to Video RAM.
๐Ÿ’ป assembly Snippet
lodsb
mov ah, 0x07
stosw
Q33
๐Ÿ“ Short Q๐Ÿ“˜ CS401๐Ÿ“‘ Lec 17๐Ÿท๏ธ Null-Terminated Strings and Length Calculation via SCASMedium๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
How do high-level languages represent string boundaries using null-terminated strings, and how does the SCAS instruction locate string termination?
๐Ÿ’ป assembly Snippet
mov al, 0
mov cx, 0xffff
repne scasb
Q34
๐Ÿ“ Short Q๐Ÿ“˜ CS401๐Ÿ“‘ Lec 17๐Ÿท๏ธ Index Pointer Post-Increment in SCAS and Null-Terminated String ProcessingMedium๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
Explain why index registers (DI/SI) point past the target character when SCAS or CMPS instructions terminate, and demonstrate how to calculate the exact length of a null-terminated string using 'REPNE SCASB'.
๐Ÿ’ป assembly Snippet
mov al, 0
mov cx, 0xffff
repne scasb
Q35
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 17๐Ÿท๏ธ Far Pointer Stack Parameter Passing Rules for LES and LDSMedium๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
When passing a 32-bit far pointer (Segment:Offset) on the stack to a subroutine that reads it using LES or LDS, in what sequence must the caller push the segment and offset words?
๐Ÿ’ป assembly Snippet
push segment_val
push offset_val
call my_subroutine
  1. A.Push Segment word first, then Offset word second
  2. B.Push Offset word first, then Segment word second
  3. C.Push both words simultaneously using a 32-bit PUSH instruction
  4. D.The order does not matter because LES automatically swaps the values
Q36
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 17๐Ÿท๏ธ LDS Instruction Memory Loading ConventionsEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
When executing the instruction 'LDS SI, [BP+4]' in 8088 assembly language, which registers are loaded from memory addresses [BP+4] and [BP+6], respectively?
๐Ÿ’ป assembly Snippet
lds si, [bp+4]
  1. A.SI is loaded from [BP+4], and DS is loaded from [BP+6]
  2. B.DS is loaded from [BP+4], and SI is loaded from [BP+6]
  3. C.SI is loaded from [BP+4], and ES is loaded from [BP+6]
  4. D.BP is loaded from [BP+4], and SI is loaded from [BP+6]
Q37
๐Ÿ“ Short Q๐Ÿ“˜ CS401๐Ÿ“‘ Lec 17๐Ÿท๏ธ LES and LDS Instructions and 32-bit Far Pointer Memory LoadingMedium๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
Explain the mechanics and purpose of the LES and LDS instructions in 8088 assembly language, detailing how segment and offset registers are loaded from a 32-bit far pointer in memory.
๐Ÿ’ป assembly Snippet
les di, [bp+4]
lds si, [far_ptr]
Q38
๐Ÿ“ Short Q๐Ÿ“˜ CS401๐Ÿ“‘ Lec 17๐Ÿท๏ธ Screen Scrolling Mechanics using MOVSW and STOSWHard๐Ÿ”โญ๐Ÿ’ก๐ŸŒŸ๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
Explain how screen scrolling is implemented in 8088 assembly language using the MOVSW instruction with the REP hardware prefix, and describe how the vacated bottom row is cleared.
๐Ÿ’ป assembly Snippet
mov ax, 0xb800
mov ds, ax
mov es, ax
mov si, 160
mov di, 0
mov cx, 1920
cld
rep movsw
Q39
๐Ÿ“ Short Q๐Ÿ“˜ CS401๐Ÿ“‘ Lec 17๐Ÿท๏ธ Hardware Interrupt Definition, Asynchronous, and Unpredictable CharacteristicsMedium๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
Define hardware interrupts in x86 architecture, and explain why interrupts are described as both 'asynchronous' and 'unpredictable'.
Q40
๐Ÿ“ Short Q๐Ÿ“˜ CS401๐Ÿ“‘ Lec 17๐Ÿท๏ธ Hardware vs Software Interrupts and Extended Far Call MechanicsMedium๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
Differentiate between Hardware Interrupts and Software Interrupts in 8088 assembly language, and explain how a software interrupt acts as an extended Far CALL mechanism.
๐Ÿ’ป assembly Snippet
int 0x21