Ch 11: Real-Time Interrupts & Timer Programming

171 Questions171 MCQs0 Short Questions0 Long Questions
๐ŸŽฏ Exam Practice Papers
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CS401 - Computer Architecture and Assembly Language Programming Examination Practice

Timed practice exam simulation for CS401 - Computer Architecture and Assembly Language Programming.

๐Ÿ“˜ VU MID TERM EXAMLectures 1 to 22
โฑ๏ธ 60 Mins

Mid Term Examination

Covers syllabus of Lectures 1 to 22 with 30 high-yield MCQs in a timed exam environment.

๐Ÿ“30 MCQs
โฑ๏ธ60 Minutes
๐Ÿ“— VU FINAL TERM EXAMLectures 23 to 45
โฑ๏ธ 90 Mins

Final Term Examination

Comprehensive semester exam preparation with 45 MCQs covering Lectures 23 to 45 with complete course coverage.

๐Ÿ“45 MCQs
โฑ๏ธ90 Minutes
Showing 51 โ€“ 60 of 171 Questions
Page 6 of 18
Q51
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 11๐Ÿท๏ธ Multitasking Kernel and Thread SchedulingMediumโญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
When a thread is registered in a multitasking kernel, its initialization code populates a Process Control Block (PCB) and attaches it to the ready queue so that the ________ can allocate execution time slices.
๐Ÿ’ป assembly Snippet
call initpcb
  1. A.Assembler
  2. B.Linker
  3. C.Scheduler
  4. D.Debugger
Q52
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 11๐Ÿท๏ธ Multitasking Kernel and Process Control Block (PCB)Medium๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
In a multitasking operating system kernel, the memory structure used to store and restore all register states of a thread during context switching is called the ________.
  1. A.Control Block
  2. B.Process Control Block (PCB)
  3. C.Stack Frame
  4. D.Interrupt Vector Table (IVT)
Q53
๐Ÿ“ Short Q๐Ÿ“˜ CS401๐Ÿ“‘ Lec 11๐Ÿท๏ธ Multitasking Kernel and Process Control BlockEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
Provide a single-line definition for the Process Control Block (PCB) in a multitasking operating system kernel.
Q54
๐Ÿ“ Short Q๐Ÿ“˜ CS401๐Ÿ“‘ Lec 11๐Ÿท๏ธ Multitasking Kernel as TSRMedium๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
Provide inline comments explaining the operation of each instruction in the following code snippet taken from a Multitasking TSR caller program: `mov al, [chars+bx]` `mov [es:40], al` `inc bx`
๐Ÿ’ป assembly Snippet
mov al, [chars+bx]
mov [es:40], al
inc bx
Q55
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 11๐Ÿท๏ธ Multitasking Kernel and Thread ManagementEasyโญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
In a multitasking operating system kernel, the creation and registration of threads can be ________.
๐Ÿ’ป assembly Snippet
int 0x80
  1. A.Static
  2. B.Dynamic
  3. C.Easy
  4. D.Difficult
Q56
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 11๐Ÿท๏ธ Multitasking Kernel and Thread SchedulingMedium๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
The thread registration code initializes the Process Control Block (PCB) and attaches it to the ready linked list so that the ________ will grant it execution time.
  1. A.Assembler
  2. B.Scheduler
  3. C.Linker
  4. D.Debugger
Q57
๐Ÿ“ Short Q๐Ÿ“˜ CS401๐Ÿ“‘ Lec 11๐Ÿท๏ธ Multitasking Kernel and PIT Timer Interrupt FrequencyMedium๐Ÿ”โญ๐Ÿ’ก๐ŸŒŸ๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
How can the responsiveness and task-switching speed of a multitasking kernel be increased in 8088 assembly language?
๐Ÿ’ป assembly Snippet
mov al, 0x36
out 0x43, al
Q58
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 11๐Ÿท๏ธ Serial Interfacing and DB-9 Pin ConfigurationMedium๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
In a standard 9-pin RS-232 serial interface (DB-9 connector), which pin number is assigned to the DSR (Data Set Ready) signal?
  1. A.Pin 4
  2. B.Pin 5
  3. C.Pin 6
  4. D.Pin 7
Q59
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 11๐Ÿท๏ธ Serial Pinout Assignment for Transmitted Data (TXD)Medium๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
In a standard 9-pin RS-232 serial interface (DB-9 connector), which pin number is assigned to TD / TXD (Transmitted Data)?
  1. A.Pin 1
  2. B.Pin 2
  3. C.Pin 3
  4. D.Pin 4
Q60
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 11๐Ÿท๏ธ Serial Pinout Assignment for Signal Ground (GND)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
In a standard 9-pin RS-232 serial interface (DB-9 connector), which pin number is assigned as Signal Ground (GND)?
  1. A.Pin 4
  2. B.Pin 5
  3. C.Pin 6
  4. D.Pin 3