Ch 06: Parameter Passing and Stack Frames

216 Questions216 MCQs0 Short Questions0 Long Questions
๐ŸŽฏ Exam Practice Papers
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CS401 - Computer Architecture and Assembly Language Programming Examination Practice

Timed practice exam simulation for CS401 - Computer Architecture and Assembly Language Programming.

๐Ÿ“˜ VU MID TERM EXAMLectures 1 to 22
โฑ๏ธ 60 Mins

Mid Term Examination

Covers syllabus of Lectures 1 to 22 with 30 high-yield MCQs in a timed exam environment.

๐Ÿ“30 MCQs
โฑ๏ธ60 Minutes
๐Ÿ“— VU FINAL TERM EXAMLectures 23 to 45
โฑ๏ธ 90 Mins

Final Term Examination

Comprehensive semester exam preparation with 45 MCQs covering Lectures 23 to 45 with complete course coverage.

๐Ÿ“45 MCQs
โฑ๏ธ90 Minutes
Showing 81 โ€“ 90 of 216 Questions
Page 9 of 22
Q81
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 6๐Ÿท๏ธ 6.1. Control Flow Instructions (CMP Zero Flag Equality Logic)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
When comparing two operands (`CMP DEST, SRC`), if the result sets the Zero Flag (`ZF = 1`), what does this indicate about the operands?
๐Ÿ’ป assembly Snippet
cmp ax, bx ; Performs AX - BX
; If AX == BX, ZF = 1
  1. A.DEST = SRC
  2. B.DEST!= SRC
  3. C.DEST < SRC
  4. D.DEST > SRC
Q82
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 6๐Ÿท๏ธ 6.1. Bit Manipulation (SHL and SAL Equivalency)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
True or False: In x86 assembly language, `SHL` (Shift Logical Left) and `SAL` (Shift Arithmetic Left) are identical in operation and assemble to the exact same machine opcodes.
๐Ÿ’ป assembly Snippet
shl ax, 1 ; Identical to sal ax, 1
sal ax, 1 ; Identical opcode and behavior as shl
  1. A.True
  2. B.False
Q83
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 6๐Ÿท๏ธ 6.1. Control Flow Instructions (JA Unsigned Jump Logic)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
True or False: The `JA` (Jump if Above) instruction CANNOT be taken after a `CMP` instruction if the unsigned destination operand is greater than the source operand.
๐Ÿ’ป assembly Snippet
cmp ax, bx
ja label ; Jumps if AX > BX (unsigned)
  1. A.true
  2. B.false
Q84
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 6๐Ÿท๏ธ 6.1. Control Flow Instructions (Conditional Jump Displacement Limits)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
In 8088/8086 assembly language architecture, conditional jump instructions (such as `JZ`, `JNZ`, `JC`, `JNC`) can perform only which type of jump?
๐Ÿ’ป assembly Snippet
jz short_label ; Short jump (-128 to +127 bytes displacement)
  1. A.Far
  2. B.short
  3. C.near
  4. D.all of the given
Q85
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 6๐Ÿท๏ธ 6.1. Control Flow Instructions (Near Jump Intra-Segment Scope)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
True or False: In 8088/8086 assembly language, a Near Jump allows transferring execution to any target offset within the same 64 KB code segment.
๐Ÿ’ป assembly Snippet
jmp near target_label ; Near jump within same 64KB CS segment
  1. A.TRUE
  2. B.FALSE
Q86
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 6๐Ÿท๏ธ 6.1. Control Flow Instructions (Conditional Jump Displacement Limits)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
In 8088/8086 assembly language architecture, conditional jump instructions (such as `JZ`, `JNZ`, `JC`, `JNC`) are restricted to which type of branch displacement?
๐Ÿ’ป assembly Snippet
jz short_label ; Short relative jump (-128 to +127 bytes)
  1. A.far
  2. B.near
  3. C.short
  4. D.all of the given
Q87
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 6๐Ÿท๏ธ 6.1. Control Flow Instructions (JA Unsigned Comparison with Two's Complement Values)Medium๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
If register `AX` contains decimal `-2` (`0xFFFE`) and register `BX` contains decimal `2` (`0x0002`), what occurs upon executing `CMP AX, BX` followed by `JA label`?
๐Ÿ’ป assembly Snippet
mov ax, -2 ; AX = 0xFFFE (65534 unsigned)
mov bx, 2  ; BX = 0x0002 (2 unsigned)
cmp ax, bx ; Performs 0xFFFE - 0x0002 -> CF = 0, ZF = 0
ja  label  ; Jump IS taken because 65534 > 2
  1. A.Zero flag will set
  2. B.Jump will be taken
  3. C.ZF will contain value -4
  4. D.Jump will not be taken
Q88
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 6๐Ÿท๏ธ 6.1. Multi-Word Arithmetic (ADC Two Operand Syntax)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
How many explicit operands does the `ADC` (Add with Carry) instruction accept in x86 assembly language?
๐Ÿ’ป assembly Snippet
adc ax, bx ; Destination = AX, Source = BX (2 operands)
  1. A.3
  2. B.0
  3. C.1
  4. D.2
Q89
๐Ÿ“ Short Q๐Ÿ“˜ CS401๐Ÿ“‘ Lec 6๐Ÿท๏ธ 6.1. Bit Manipulation (SHR vs SAR Shift Operations)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
Explain the difference between `SHR` (Shift Logical Right) and `SAR` (Shift Arithmetic Right) instructions in x86 assembly language.
๐Ÿ’ป assembly Snippet
shr ax, 1 ; Logical right shift (fills MSB with 0)
sar ax, 1 ; Arithmetic right shift (preserves MSB sign bit)
Q90
๐Ÿ“ Short Q๐Ÿ“˜ CS401๐Ÿ“‘ Lec 6๐Ÿท๏ธ 6.1. Multi-Word Arithmetic (ADC Add with Carry Mechanics and Application)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
In x86 assembly language, explain the operation and mechanics of the `ADC` (Add with Carry) instruction, and how it is used for multi-word addition.
๐Ÿ’ป assembly Snippet
; Adding 32-bit integers (DX:AX) + (CX:BX)
add ax, bx ; Add lower 16 bits (sets CF if carry occurs)
adc dx, cx ; Add upper 16 bits plus Carry Flag (CF)