Ch 06: Parameter Passing and Stack Frames

216 Questions216 MCQs0 Short Questions0 Long Questions
๐ŸŽฏ Exam Practice Papers
SEMESTER PASS

CS401 - Computer Architecture and Assembly Language Programming Examination Practice

Timed practice exam simulation for CS401 - Computer Architecture and Assembly Language Programming.

๐Ÿ“˜ VU MID TERM EXAMLectures 1 to 22
โฑ๏ธ 60 Mins

Mid Term Examination

Covers syllabus of Lectures 1 to 22 with 30 high-yield MCQs in a timed exam environment.

๐Ÿ“30 MCQs
โฑ๏ธ60 Minutes
๐Ÿ“— VU FINAL TERM EXAMLectures 23 to 45
โฑ๏ธ 90 Mins

Final Term Examination

Comprehensive semester exam preparation with 45 MCQs covering Lectures 23 to 45 with complete course coverage.

๐Ÿ“45 MCQs
โฑ๏ธ90 Minutes
Showing 31 โ€“ 40 of 216 Questions
Page 4 of 22
Q31
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 6๐Ÿท๏ธ 6.1. Bit Manipulation (RCR Rotate through Carry Right)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
Which rotation operation inserts the Carry Flag into the leftmost position (MSB), shifts all bits one position to the right, and copies the exiting rightmost bit (LSB) into the Carry Flag?
๐Ÿ’ป assembly Snippet
rcr ax, 1 ; Shifts CF into MSB, shifts bits right, LSB into CF
  1. A.RCR
  2. B.ROL
  3. C.RCL
  4. D.ROR
Q32
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 6๐Ÿท๏ธ 6.1. Control Flow Instructions (Parity Flag Jump Instructions JP and JPE)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
Which conditional jump instruction is taken if the last arithmetic operation produced a result in its destination with even parity (Parity Flag `PF = 1`)?
๐Ÿ’ป assembly Snippet
test al, al
jpe even_parity_label ; Jumps if PF == 1 (synonymous with JP)
  1. A.JP
  2. B.JPE
  3. C.JNP
  4. D.both JP and JPE
Q33
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 6๐Ÿท๏ธ 6.1. Control Flow Instructions (Carry Flag Unsigned Borrow)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
When an unsigned source operand is subtracted from a smaller unsigned destination operand (`CMP DEST, SRC`), a borrow is required. Which status flag will be set?
๐Ÿ’ป assembly Snippet
mov ax, 3
cmp ax, 5 ; 3 < 5 -> Requires borrow, sets CF = 1
  1. A.ZF
  2. B.CF
  3. C.SF
  4. D.OF
Q34
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 6๐Ÿท๏ธ 6.1. Bit Manipulation (SHR vs SAL Shift Operations)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
True or False: The x86 assembly instructions `SHR` (Shift Logical Right) and `SAL` (Shift Arithmetic Left) perform the same shift operation.
  1. A.True
  2. B.False
Q35
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 6๐Ÿท๏ธ 6.1. Control Flow Instructions (JA Conditional Jump)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
True or False: The `JA` (Jump if Above) instruction cannot trigger a jump after a `CMP` instruction if the unsigned destination operand is greater than the source operand.
๐Ÿ’ป assembly Snippet
cmp ax, bx
ja label ; Jumps if AX > BX (unsigned)
  1. A.True
  2. B.False
Q36
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 6๐Ÿท๏ธ 6.1. Bit Manipulation (SHR Bit Shift Diagram)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
The bit shift operation diagram `| 0 | --> | 1 | 1 | 0 | 1 | 0 | 0 | 0 | --> | C |` (inserting 0 into MSB from left, shifting bits right, and dropping LSB into Carry Flag) represents which instruction?
๐Ÿ’ป assembly Snippet
shr ax, 1 ; Inserts 0 into MSB from left, shifts bits right, LSB to Carry Flag
  1. A.Shl
  2. B.sar
  3. C.Shr
  4. D.Sal
Q37
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 6๐Ÿท๏ธ 6.1. Bit Manipulation (SHL Bit Shift Diagram)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
The bit shift operation diagram `| C | <-- | 1 | 1 | 0 | 1 | 0 | 0 | 0 | <-- | 0 |` (inserting 0 into LSB from right, shifting bits left, and dropping MSB into Carry Flag) represents which instruction?
๐Ÿ’ป assembly Snippet
shl ax, 1 ; Inserts 0 into LSB from right, shifts bits left, MSB to Carry Flag
  1. A.Shl
  2. B.sar
  3. C.Shr
  4. D.Sal
Q38
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 6๐Ÿท๏ธ 6.1. Control Flow Instructions (JNE vs JNZ Synonymous Mnemonics)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
Between the conditional jump mnemonics `JNE` (Jump if Not Equal) and `JNZ` (Jump if Not Zero), the functional difference exists only for the __________.
๐Ÿ’ป assembly Snippet
cmp ax, bx
jne label ; Synonymous with JNZ label (tests ZF == 0)
  1. A.Programmer or Logic
  2. B.Assembler
  3. C.Debugger
  4. D.IAPX88 Processor
Q39
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 6๐Ÿท๏ธ 6.1. Control Flow Instructions (JMP Unconditional Jump)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
An instruction that, upon execution, unconditionally branches to a target address regardless of the state of any CPU flags is called a(n) __________.
๐Ÿ’ป assembly Snippet
jmp target_label ; Unconditional branch
  1. A.Jump
  2. B.Conditional jump
  3. C.Unconditional jump
  4. D.Stay
Q40
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 6๐Ÿท๏ธ 6.1. Control Flow Instructions (Zero Flag Equality Condition)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
When performing a comparison (`CMP DEST, SRC`), if the result of subtracting source from destination is zero, the Zero Flag is set (`ZF = 1`). What does this condition indicate?
๐Ÿ’ป assembly Snippet
cmp ax, bx ; If AX == BX, ZF = 1
  1. A.DEST = SRC
  2. B.DEST!= SRC
  3. C.DEST < SRC
  4. D.DEST > SRC