Ch 03: Branching, Loops and Program Flow

261 Questions261 MCQs0 Short Questions0 Long Questions
๐ŸŽฏ Exam Practice Papers
SEMESTER PASS

CS401 - Computer Architecture and Assembly Language Programming Examination Practice

Timed practice exam simulation for CS401 - Computer Architecture and Assembly Language Programming.

๐Ÿ“˜ VU MID TERM EXAMLectures 1 to 22
โฑ๏ธ 60 Mins

Mid Term Examination

Covers syllabus of Lectures 1 to 22 with 30 high-yield MCQs in a timed exam environment.

๐Ÿ“30 MCQs
โฑ๏ธ60 Minutes
๐Ÿ“— VU FINAL TERM EXAMLectures 23 to 45
โฑ๏ธ 90 Mins

Final Term Examination

Comprehensive semester exam preparation with 45 MCQs covering Lectures 23 to 45 with complete course coverage.

๐Ÿ“45 MCQs
โฑ๏ธ90 Minutes
Showing 251 โ€“ 260 of 261 Questions
Page 26 of 27
Q251
๐Ÿ“ Short Q๐Ÿ“˜ CS401๐Ÿ“‘ Lec 3๐Ÿท๏ธ 3.1. Conditional JumpsMediumโญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
How do conditional jump instructions interpret destination and source operands after a CMP instruction, and what distinguishes unsigned jumps (JA, JB) from signed jumps (JG, JL) regarding bit interpretation?
๐Ÿ’ป assembly Snippet
; Unsigned vs Signed Operand Comparison
cmp ax, bx    ; Compares AX (Destination) to BX (Source)
ja unsigned_above  ; Unsigned: Jumps if AX > BX (Unsigned magnitude)
jg signed_greater   ; Signed: Jumps if AX > BX (Signed 2's complement)
Q252
๐Ÿ“ Short Q๐Ÿ“˜ CS401๐Ÿ“‘ Lec 3๐Ÿท๏ธ 3.1. Conditional JumpsMediumโญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
What is the JCXZ (Jump if CX Register is Zero) instruction in 8086 assembly language, how does it differ from standard conditional jumps, and what is its primary use case?
๐Ÿ’ป assembly Snippet
; Using JCXZ to prevent zero-counter loop errors
mov cx, count       ; Load iteration count into CX
jcxz skip_loop      ; If CX == 0, jump past loop

loop_start:
; ... process item ...
loop loop_start     ; Decrement CX and loop if CX != 0

skip_loop:
Q253
๐Ÿ“ Short Q๐Ÿ“˜ CS401๐Ÿ“‘ Lec 3๐Ÿท๏ธ 3.1. Conditional JumpsMediumโญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
How does the JCXZ (Jump if CX Register is Zero) instruction treat the CX register, how does it differ from flag-based conditional jumps, and why is there no 'JCNZ' instruction?
๐Ÿ’ป assembly Snippet
; Testing CX Register with JCXZ
mov cx, 0
jcxz cx_is_zero    ; Jump taken because CX == 0 (no flags modified)

; Alternative non-zero test using CMP/JNE
cmp cx, 0
jne cx_is_not_zero ; Branch if CX != 0
Q254
๐Ÿ“ Short Q๐Ÿ“˜ CS401๐Ÿ“‘ Lec 3๐Ÿท๏ธ 3.2. Unconditional JumpsMediumโญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
Why does placing data definitions at offset 0x0100 in a DOS.COM executable cause execution errors, and how does the JMP (Unconditional Jump) instruction resolve this?
๐Ÿ’ป assembly Snippet
; Placing Data at Start using JMP
[org 0x0100]
jmp start          ; Unconditional jump past data declarations

num1 dw 100        ; Data variable stored at offset 0x0103
num2 dw 200

start:             ; Execution resumes here
mov ax, [num1]
add ax, [num2]
Q255
๐Ÿ“ Short Q๐Ÿ“˜ CS401๐Ÿ“‘ Lec 3๐Ÿท๏ธ 3.2. Unconditional JumpsHardโญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
What is PC-Relative Addressing in x86 jump instructions, and how does the CPU calculate the absolute target address from a relative jump operand?
๐Ÿ’ป assembly Snippet
; Relative Addressing Mechanics
; Instruction at 0x0100: JMP start (Encodes displacement +0x0016)
; IP after fetch = 0x0103
; Target Address = 0x0103 + 0x0016 = 0x0119
Q256
๐Ÿ“ Short Q๐Ÿ“˜ CS401๐Ÿ“‘ Lec 3๐Ÿท๏ธ 3.2. Unconditional JumpsMediumโญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
Explain how relative displacement addition works during jump execution in 8086 architecture, using the example of an instruction at offset 0x0100 with relative offset 0x0016.
๐Ÿ’ป assembly Snippet
; Relative Jump Target Address Calculation
; Instruction at offset 0x0100: JMP target_label (3 bytes: E9 16 00)
; Fetch phase updates IP to 0x0103
; Target IP = 0x0103 + 0x0016 = 0x0119
Q257
๐Ÿ“ Short Q๐Ÿ“˜ CS401๐Ÿ“‘ Lec 3๐Ÿท๏ธ 3.3. Types of JumpsMediumโญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
Compare Short Jump and Near Jump instructions in 8086 assembly language in terms of operand size, total instruction length, displacement range, and conditional branch restrictions.
๐Ÿ’ป assembly Snippet
; Short Jump vs Near Jump Examples
jz short_target   ; Conditional jump: strictly 8-bit short jump (-128 to +127)
jmp near_target   ; Unconditional jump: 16-bit near jump (covers full 64 KB CS)
Q258
๐Ÿ“ Short Q๐Ÿ“˜ CS401๐Ÿ“‘ Lec 3๐Ÿท๏ธ 3.3. Types of JumpsHardโญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
What is a Far Jump in 8086 assembly language, how does it differ fundamentally from Short and Near jumps, and what CPU registers does it modify?
๐Ÿ’ป assembly Snippet
; Far Jump Execution Example
jmp 0x2000:0x0100 ; Far jump: Loads CS = 0x2000, IP = 0x0100 (5 bytes total)
Q259
๐Ÿ“ Short Q๐Ÿ“˜ CS401๐Ÿ“‘ Lec 3๐Ÿท๏ธ 3.3. Types of JumpsMediumโญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
Which three program control instructions in 8086 architecture have far variants, and how do far execution calls modify physical target addresses compared to intrasegment calls?
๐Ÿ’ป assembly Snippet
; Far Program Control Examples
jmp far 0x2000:0x0100     ; Far Jump: Loads CS = 0x2000, IP = 0x0100
call far [procedure_ptr]  ; Far Call: Loads 4-byte CS:IP pointer from memory
retf                      ; Far Return: Pops IP then CS from stack
Q260
๐Ÿ“ Short Q๐Ÿ“˜ CS401๐Ÿ“‘ Lec 3๐Ÿท๏ธ 3.1. Conditional JumpsHardโญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
How do unsigned jump instructions (JBE/JAE) and signed jump instructions (JLE/JGE) alter sorting behavior when array elements contain negative numbers in two's complement representation?
๐Ÿ’ป assembly Snippet
; Array containing negative numbers in two's complement
array dw 5, -2, 10, -1, 0 ; -2 = 0xFFFE (65,534), -1 = 0xFFFF (65,535)

; Unsigned vs Signed Ascending Comparison
cmp ax, [si]       ; Compare current array element with adjacent
jbe no_swap_un     ; Unsigned: treats 0xFFFE as 65534 (places at END)
jle no_swap_sn     ; Signed: treats 0xFFFE as -2 (places at START)