Ch 03: Branching, Loops and Program Flow

261 Questions261 MCQs0 Short Questions0 Long Questions
๐ŸŽฏ Exam Practice Papers
SEMESTER PASS

CS401 - Computer Architecture and Assembly Language Programming Examination Practice

Timed practice exam simulation for CS401 - Computer Architecture and Assembly Language Programming.

๐Ÿ“˜ VU MID TERM EXAMLectures 1 to 22
โฑ๏ธ 60 Mins

Mid Term Examination

Covers syllabus of Lectures 1 to 22 with 30 high-yield MCQs in a timed exam environment.

๐Ÿ“30 MCQs
โฑ๏ธ60 Minutes
๐Ÿ“— VU FINAL TERM EXAMLectures 23 to 45
โฑ๏ธ 90 Mins

Final Term Examination

Comprehensive semester exam preparation with 45 MCQs covering Lectures 23 to 45 with complete course coverage.

๐Ÿ“45 MCQs
โฑ๏ธ90 Minutes
Showing 191 โ€“ 200 of 261 Questions
Page 20 of 27
Q191
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 3๐Ÿท๏ธ ADC Instruction Syntax and OperandsEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
How many explicit operands are accepted by the ADC (Add with Carry) assembly instruction?
๐Ÿ’ป assembly Snippet
adc ax, bx
  1. A.0 operands
  2. B.1 operand
  3. C.2 operands
  4. D.3 operands
Q192
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 3๐Ÿท๏ธ DIV Instruction Implied Dividend RegistersEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
When the divisor operand of a DIV instruction is 16 bits wide, what is the bit-width of the implied dividend?
๐Ÿ’ป assembly Snippet
div bx
  1. A.64 bits
  2. B.32 bits
  3. C.16 bits
  4. D.8 bits
Q193
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 3๐Ÿท๏ธ Far Jump Mechanics and Absolute AddressingMedium๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
Unlike short and near relative jumps, a 'Far' jump instruction specifies a complete segment and offset target, making it which type of jump?
๐Ÿ’ป assembly Snippet
jmp 0x1000:0x0200
  1. A.Memory dependent
  2. B.Absolute
  3. C.Temporary
  4. D.Indirect
Q194
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 3๐Ÿท๏ธ DIV Instruction Operand FormsEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
How many distinct operational forms (operand sizes) does the DIV (Unsigned Division) instruction possess in 8088 assembly language?
๐Ÿ’ป assembly Snippet
div bl
div bx
  1. A.Two forms (8-bit divisor and 16-bit divisor)
  2. B.Three forms
  3. C.Four forms
  4. D.Five forms
Q195
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 3๐Ÿท๏ธ Divide Overflow Error and INT 0 ExceptionEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
When a dividend is divided by a small divisor such that the calculated quotient exceeds the storage capacity of the destination register, what type of error occurs?
๐Ÿ’ป assembly Snippet
mov ax, 1000
mov bl, 1
div bl
  1. A.Divide logical error
  2. B.Divide overflow error
  3. C.Divide syntax error
  4. D.An illegal instruction
Q196
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 3๐Ÿท๏ธ ADC Instruction Operands and SyntaxEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
How many explicit operands are accepted by the ADC (Add with Carry) instruction?
๐Ÿ’ป assembly Snippet
adc ax, bx
  1. A.Two operands
  2. B.Three operands
  3. C.Five operands
  4. D.Zero operands
Q197
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 3๐Ÿท๏ธ Carry Flag (CF) and Multi-Word AdditionEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
When two 16-bit unsigned numbers are added, the result can be up to 17 bits long. In which flag bit is this 17th overflow/carry bit stored for testing and multi-word arithmetic?
๐Ÿ’ป assembly Snippet
add ax, bx
adc dx, cx
  1. A.Carry Flag (CF)
  2. B.Parity Flag (PF)
  3. C.Auxiliary Carry Flag (AF)
  4. D.Zero Flag (ZF)
Q198
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 3๐Ÿท๏ธ ADD Instruction Operation MechanicsEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
What is the exact execution result of the assembly operation code 'ADD AX, BX'?
๐Ÿ’ป assembly Snippet
add ax, bx
  1. A.Adds the value of BX to AX and modifies register BX
  2. B.Adds the value of AX to BX and modifies register AX
  3. C.Adds the value of BX to AX and stores the result in AX (modifying AX)
  4. D.Adds the value of BX to AX and modifies nothing
Q199
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 3๐Ÿท๏ธ ADD Instruction Mechanics and DocumentationEasy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
Consider the assembly instruction 'ADD AX, BX' in a program that adds two numbers. What is the most accurate inline comment describing this instruction?
๐Ÿ’ป assembly Snippet
add ax, bx
  1. A.; No comment needed
  2. B.; accumulate sum in add
  3. C.; accumulate sum in AX
  4. D.; accumulate sum in BX
Q200
โ“ MCQ๐Ÿ“˜ CS401๐Ÿ“‘ Lec 3๐Ÿท๏ธ Instruction Mnemonics and Opcode Equivalence (JNE / JNZ)Easy๐Ÿ”โญ๐Ÿ’ก๐Ÿ“„๐ŸŽ“VU๐Ÿ›๏ธVU
What is the distinction between the assembly jump instructions JNE (Jump if Not Equal) and JNZ (Jump if Not Zero)?
๐Ÿ’ป assembly Snippet
cmp ax, bx
jne target

sub cx, 1
jnz target
  1. A.They are functionally identical and assemble to the same opcode; the difference is only for programmer readability
  2. B.They generate completely different machine code opcodes in the assembler
  3. C.JNE is handled by the debugger while JNZ is handled by the processor
  4. D.JNE works on signed numbers while JNZ works on floating-point numbers