Linear IR & Three-Address Code Representations

Lecture 36 of CS606 Compiler Construction introduces Three-Address Code (3AC), the most prevalent linear intermediate representation used in modern optimizing compilers. The defining characteristic of Three-Address Code is that every instruction contains at most one operator and at most three operands (two source operands and one destination operand): x = y op z. Because arbitrary complex source expressions (such as a = b * -c + b * -c) involve multiple algebraic operations, the compiler must linearize the expression by unraveling nested operations and introducing distinct compiler-generated temporary variables (t1, t2, ...). Students study why 3AC is attractive: it is close to target machine assembly without register constraints, lacks destructive side-effects, allows easy instruction reordering, and provides an ideal intermediate substrate for machine-independent optimization. Scholars examine how type checking systems enforce static semantic consistency across arithmetic expressions, assignments, and function signatures. Memory management techniques spanning static allocation, stack-based activation records, and heap allocation are evaluated in detail. The lesson explores register allocation heuristics, demonstrating how Chaitin graph coloring minimizes memory spills in CPU register starved environments. Quadruple, triple, and indirect triple data structures are compared regarding memory overhead and ease of compiler instruction reordering. Students study intermediate code generation for multidimensional array references, evaluating base addresses and row-major displacement calculations. Key compiler optimization passes spanning loop invariant code motion, constant folding, and dead code elimination are systematically demystified. By engaging with solved past papers by Moaaz and Waqar Siddhu, learners gain actionable insights into recurrent university exam questions. Interactive quiz assessments on VU SIGMA facilitate rapid knowledge verification and retention of critical compiler engineering terminology. Comprehensive coverage of IEEE and ACM curricula standards ensures learners communicate with technical precision across global systems engineering teams. Detailed analysis of machine code selection highlights the imperative of generating instruction sequences that maximize hardware pipeline throughput. Intermediate representation taxonomy categorizes structural formats into graphical ASTs, linear tuples, and hybrid tree-address models. The strategic role of peephole optimization is evaluated as a final localized pass to eliminate redundant loads, stores, and jumps.