Intermediate Representations (IR) Taxonomy

Lecture 35 of CS606 Compiler Construction examines the taxonomy and design trade-offs of compiler Intermediate Representations (IR). An IR is a data structure or notation that encodes the semantic meaning of source code without binding it to target machine assembly details. The lecture categorizes IRs into three primary organizational models: Graphical IRs (such as Abstract Syntax Trees and Directed Acyclic Graphs), which retain hierarchical program structure and are ideal for early semantic analysis; Linear IRs (such as Three-Address Code and bytecode), which model execution as a pseudo-assembly instruction sequence and are ideal for low-level optimization; and Hybrid IRs (such as Control Flow Graphs of basic blocks), which combine linear instruction streams with graphical control-flow edges. Students analyze trade-offs regarding level of abstraction, ease of code transformation, memory footprint, and compiler execution performance. Automated compiler generation utilities such as Lex and YACC are presented as indispensable instruments for industrial language processing. Top-down and bottom-up parsing techniques are contrasted regarding grammatical expressive power, lookahead requirements, and implementation complexity. Shift-reduce and reduce-reduce grammatical conflicts are analyzed alongside operator precedence declarations to eliminate parsing ambiguities. The curriculum traces the progressive transformation of source text through tokens, parse trees, abstract syntax trees, and linear three-address tuples. Practical considerations for short-circuit boolean evaluation and label backpatching provide rigorous quantitative decision support for control flow compilation. Scholars examine how type checking systems enforce static semantic consistency across arithmetic expressions, assignments, and function signatures. Memory management techniques spanning static allocation, stack-based activation records, and heap allocation are evaluated in detail. The lesson explores register allocation heuristics, demonstrating how Chaitin graph coloring minimizes memory spills in CPU register starved environments. Quadruple, triple, and indirect triple data structures are compared regarding memory overhead and ease of compiler instruction reordering. Students study intermediate code generation for multidimensional array references, evaluating base addresses and row-major displacement calculations. Key compiler optimization passes spanning loop invariant code motion, constant folding, and dead code elimination are systematically demystified.