Branching
Lecture 8: Branching
261 Questions205 MCQs51 Short Questions5 Long Questions
Showing 61 – 70 of 261 Questions
Page 7 of 27
Q61❓ MCQ📑 Lec 3Easy🔁Repeated⭐High-Yield💡Conceptual
Which x86 assembly instruction performs an unsigned multiplication of the source operand and the accumulator register?
Q62❓ MCQ📑 Lec 3Medium🔁Repeated⭐High-Yield💡Conceptual
If `BB` is the opcode for moving a 16-bit constant to register `BX` (or `B8` for `AX`), and decimal constant 336 equals hex `0x0150`, what is the hexadecimal representation of the instruction `MOV AX, 336` (`0x0150`) using x86 Little-Endian byte ordering (where opcode is `BB` as specified in question prompt)?
Q63❓ MCQ📑 Lec 3Easy🔁Repeated⭐High-Yield💡Conceptual
In the assembly instruction `MOV AX, 5`, how many operands are present?
Q64❓ MCQ📑 Lec 3Easy🔁Repeated⭐High-Yield💡Conceptual
In assembly language, the CX register is normally used as a __________ register.
Q65❓ MCQ📑 Lec 3Easy🔁Repeated⭐High-Yield💡Conceptual
When a 16-bit dividend is divided by an 8-bit divisor (`DIV reg8`), which register must hold the 16-bit dividend prior to division?
Q66❓ MCQ📑 Lec 3Easy🔁Repeated⭐High-Yield💡Conceptual
In x86 assembly language architecture, what primary data type do Index Registers (such as `SI` and `DI`) store during memory access?
Q67❓ MCQ📑 Lec 3Easy🔁Repeated⭐High-Yield💡Conceptual
In which processor register do the individual bits work independently and bit-wise individually to hold distinct status flags or control states?
Q68❓ MCQ📑 Lec 3Easy🔁Repeated⭐High-Yield💡Conceptual
When a 32-bit dividend stored in register pair DX:AX is divided by a 16-bit divisor operand using `DIV`, what is the bit width of the resulting quotient stored in AX?
Q69❓ MCQ📑 Lec 3Easy🔁Repeated⭐High-Yield💡Conceptual
When a 16-bit dividend in AX is divided by an 8-bit divisor operand using `DIV`, in which register is the quotient placed?
Q70❓ MCQ📑 Lec 3Easy🔁Repeated⭐High-Yield💡Conceptual
How many explicit operands does the Add with Carry instruction `ADC` take in assembly language syntax?