Addressing Modes

Lecture 7: Addressing Modes

395 Questions320 MCQs71 Short Questions4 Long Questions
Showing 241250 of 395 Questions
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Q241📝 Short Q📑 Lec 2Easy🔁RepeatedHigh-Yield💡Conceptual
Write the names and functions of the three CPU flags that are classified as control flags and are NOT used for mathematical operations.
Q242❓ MCQ📑 Lec 2MediumHigh-Yield💡Conceptual
Which type of jump instruction in 8088 assembly language is absolute rather than position-relative?
💻 assembly Snippet
jmp far ptr target
  1. A.Far jump
  2. B.Short jump
  3. C.Near jump
  4. D.Conditional jump
Q243❓ MCQ📑 Lec 2EasyHigh-Yield💡Conceptual
The iAPX88 (8088) CPU architecture consists of how many total internal registers?
  1. A.12
  2. B.14
  3. C.16
  4. D.18
Q244❓ MCQ📑 Lec 2EasyHigh-Yield💡Conceptual
When two 16-bit numbers are added, the sum can be up to 17 bits long. This extra 17th bit that cannot fit in the 16-bit destination register is stored in the:
💻 assembly Snippet
add ax, bx
  1. A.Carry Flag (CF)
  2. B.Parity Flag (PF)
  3. C.Auxiliary Carry Flag (AF)
  4. D.Zero Flag (ZF)
Q245❓ MCQ📑 Lec 2Easy🔁RepeatedHigh-Yield💡Conceptual
The 8088 is a 16-bit processor with its accumulator (AX) and all general registers having a width of:
  1. A.32 bits
  2. B.6 bits
  3. C.16 bits
  4. D.8 bits
Q246❓ MCQ📑 Lec 2EasyHigh-Yield💡Conceptual
In NASM 8088 assembly language, the instruction 'MOV byte [num1], 5' is a:
💻 assembly Snippet
mov byte [num1], 5
  1. A.Legal instruction
  2. B.Illegal instruction
  3. C.Stack-based instruction
  4. D.Memory indirect instruction
Q247❓ MCQ📑 Lec 2EasyHigh-Yield💡Conceptual
On the system bus architecture, memory address signals always move from the:
  1. A.Processor to memory
  2. B.Memory to processor
  3. C.Memory to peripheral
  4. D.Peripheral to processor
Q248❓ MCQ📑 Lec 2Easy🔁RepeatedHigh-Yield💡Conceptual
In 8088 CPU architecture, the Code Segment (CS) register is implicitly associated with which register by default to fetch instructions?
  1. A.Instruction Pointer (IP)
  2. B.Stack Segment (SS)
  3. C.Base Pointer (BP)
  4. D.Count Register (CX)
Q249❓ MCQ📑 Lec 2EasyHigh-Yield💡Conceptual
A 32-bit microprocessor (such as the Intel 80386) features an accumulator register (EAX) with a bit width of:
  1. A.8 bits
  2. B.16 bits
  3. C.32 bits
  4. D.64 bits
Q250❓ MCQ📑 Lec 2MediumHigh-Yield💡Conceptual
In NASM assembly language, if the offset address of label 'num1' is 0x0117 and its memory content is 0x0005, then after executing 'MOV BX, num1', register BX will contain:
💻 assembly Snippet
num1: dw 0x0005
mov bx, num1
  1. A.0005
  2. B.0117
  3. C.num1
  4. D.1701